1*cceb5f97SNick Forrington[
2*cceb5f97SNick Forrington    {
3*cceb5f97SNick Forrington        "ArchStdEvent": "CPU_CYCLES"
4*cceb5f97SNick Forrington    },
5*cceb5f97SNick Forrington    {
6*cceb5f97SNick Forrington        "ArchStdEvent": "BUS_ACCESS"
7*cceb5f97SNick Forrington    },
8*cceb5f97SNick Forrington    {
9*cceb5f97SNick Forrington        "ArchStdEvent": "BUS_CYCLES"
10*cceb5f97SNick Forrington    },
11*cceb5f97SNick Forrington    {
12*cceb5f97SNick Forrington        "ArchStdEvent": "BUS_ACCESS_RD"
13*cceb5f97SNick Forrington    },
14*cceb5f97SNick Forrington    {
15*cceb5f97SNick Forrington        "ArchStdEvent": "BUS_ACCESS_WR"
16*cceb5f97SNick Forrington    },
17*cceb5f97SNick Forrington    {
18*cceb5f97SNick Forrington        "ArchStdEvent": "CNT_CYCLES"
19*cceb5f97SNick Forrington    }
20*cceb5f97SNick Forrington]
21