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H A D | gpucc-msm8998.c | 53748348 Thu Jan 14 16:10:59 CST 2021 AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> clk: qcom: gpucc-msm8998: Allow fabia gpupll0 rate setting
The GPU PLL0 is not a fixed PLL and the rate can be set on it: this is necessary especially on boards which bootloader is setting a very low rate on this PLL before booting Linux, which would be unsuitable for postdividing to reach the maximum allowed Adreno GPU frequency of 710MHz (or, actually, even 670MHz..) on this SoC.
To allow setting rates on the GPU PLL0, also define VCO boundaries and set the CLK_SET_RATE_PARENT flag to the GPU PLL0 postdivider.
With this change, the Adreno GPU is now able to scale through all the available frequencies.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Link: https://lore.kernel.org/r/20210114221059.483390-12-angelogioacchino.delregno@somainline.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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