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H A Dskl-pcm.c179c2e86 Mon Apr 02 01:45:49 CDT 2018 Divya Prakash <divya1.prakash@intel.com> ASoC: Intel: Skylake: Reset DSP pipe in skl_pcm_hw_free

Currently during destroy pipeline the gateway is disabled
before DMA completion. This leads to improper draining of
data and subsequently causing issues on HD-Audio DMA.
Hence added a new pipe reset IPC in skl_pcm_hw_free in
which the Gateway Enable(GEN bit) is reset to 0 after
DMA completion in skl_pcm_trigger.

Signed-off-by: Divya Prakash <divya1.prakash@intel.com>
Signed-off-by: Sriram Periyasamy <sriramx.periyasamy@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
179c2e86 Mon Apr 02 01:45:49 CDT 2018 Divya Prakash <divya1.prakash@intel.com> ASoC: Intel: Skylake: Reset DSP pipe in skl_pcm_hw_free

Currently during destroy pipeline the gateway is disabled
before DMA completion. This leads to improper draining of
data and subsequently causing issues on HD-Audio DMA.
Hence added a new pipe reset IPC in skl_pcm_hw_free in
which the Gateway Enable(GEN bit) is reset to 0 after
DMA completion in skl_pcm_trigger.

Signed-off-by: Divya Prakash <divya1.prakash@intel.com>
Signed-off-by: Sriram Periyasamy <sriramx.periyasamy@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>