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H A D | m52xxacr.h | 0ef6c9b8 Mon Nov 08 23:31:08 CST 2010 Greg Ungerer <gerg@uclinux.org> m68knommu: support version 2 ColdFire split cache
The newer version 2 ColdFire CPU cores support a configurable cache arrangement. The cache memory can be used as all instruction cache, all data cache, or split in half for both instruction and data caching. Support this setup via a Kconfig time menu that allows a kernel builder to choose the arrangement they want to use.
Signed-off-by: Greg Ungerer <gerg@uclinux.org> 0ef6c9b8 Mon Nov 08 23:31:08 CST 2010 Greg Ungerer <gerg@uclinux.org> m68knommu: support version 2 ColdFire split cache The newer version 2 ColdFire CPU cores support a configurable cache arrangement. The cache memory can be used as all instruction cache, all data cache, or split in half for both instruction and data caching. Support this setup via a Kconfig time menu that allows a kernel builder to choose the arrangement they want to use. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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