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/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dsamsung,pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
12 - Tomasz Figa <tomasz.figa@gmail.com>
22 - External GPIO interrupts (see interrupts property in pin controller node);
24 - External wake-up interrupts - multiplexed (capable of waking up the system
25 see interrupts property in external wake-up interrupt controller node -
26 samsung,pinctrl-wakeup-interrupt.yaml);
[all …]
H A Dste,nomadik.txt4 - compatible: "stericsson,db8500-pinctrl", "stericsson,db8540-pinctrl",
5 "stericsson,stn8815-pinctrl"
6 - nomadik-gpio-chips: array of phandles to the corresponding GPIO chips
8 - prcm: phandle to the PRCMU managing the back end of this pin controller
10 Please refer to pinctrl-bindings.txt in this directory for details of the
16 pin, a group, or a list of pins or groups. This configuration can include the
23 (see pinctrl-bindings.txt):
26 - function: A string containing the name of the function to mux to the
28 - groups : An array of strings. Each string contains the name of a pin
30 set-up.
[all …]
H A Dsamsung,pinctrl-gpio-bank.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/samsung,pinctrl-gpio-bank.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S3C/S5P/Exynos SoC pin controller - gpio bank
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
12 - Tomasz Figa <tomasz.figa@gmail.com>
24 '#gpio-cells':
27 gpio-controller: true
[all …]
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8192-asurada-hayato-r1.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 /dts-v1/;
6 #include "mt8192-asurada.dtsi"
7 #include "mt8192-asurada-audio-rt1015p-rt5682.dtsi"
11 compatible = "google,hayato-rev1", "google,hayato", "mediatek,mt8192";
15 function-row-physmap = <
44 bt_pins: bt-pins {
45 pins-bt-kill {
47 output-low;
50 pins-bt-wake {
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsa8295p-adp.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/spmi/spmi.h>
14 #include "sa8540p-pmics.dtsi"
18 compatible = "qcom,sa8295p-adp", "qcom,sa8540p";
25 stdout-path = "serial0:115200n8";
28 dp2-connector {
29 compatible = "dp-connector";
[all …]
H A Dsc8280xp-crd.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include "sc8280xp-pmics.dtsi"
17 compatible = "qcom,sc8280xp-crd", "qcom,sc8280xp";
26 compatible = "pwm-backlight";
28 enable-gpios = <&pmc8280_1_gpios 8 GPIO_ACTIVE_HIGH>;
29 power-supply = <&vreg_edp_bl>;
31 pinctrl-names = "default";
[all …]
H A Dsa8540p-ride.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include "sa8540p-pmics.dtsi"
17 compatible = "qcom,sa8540p-ride", "qcom,sa8540p";
29 stdout-path = "serial0:115200n8";
34 regulators-0 {
35 compatible = "qcom,pm8150-rpmh-regulators";
36 qcom,pmic-id = "a";
[all …]
H A Dsa8775p-ride.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include "sa8775p-pmics.dtsi"
16 compatible = "qcom,sa8775p-ride", "qcom,sa8775p";
31 stdout-path = "serial0:115200n8";
36 regulators-0 {
37 compatible = "qcom,pmm8654au-rpmh-regulators";
38 qcom,pmic-id = "a";
[all …]
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3308-rock-pi-s.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/leds/common.h>
24 stdout-path = "serial0:1500000n8";
28 compatible = "gpio-leds";
29 pinctrl-names = "default";
30 pinctrl-0 = <&green_led>, <&heartbeat_led>;
32 green-led {
34 default-state = "on";
38 linux,default-trigger = "default-on";
[all …]
H A Drk3328-a1.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
2 // Copyright (c) 2017-2019 Arm Ltd.
4 /dts-v1/;
9 compatible = "azw,beelink-a1", "rockchip,rk3328";
17 * UART pins, as viewed with bottom of case removed:
20 * /-------
21 * L / o <- Gnd
22 * e / o <-- Rx
23 * f / o <--- Tx
24 * t / o <---- +3.3v
[all …]
H A Drk3566-box-demo.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/pinctrl/rockchip.h>
13 #include <dt-bindings/soc/rockchip,vop2.h>
18 compatible = "rockchip,rk3566-box-demo", "rockchip,rk3566";
28 stdout-path = "serial2:1500000n8";
31 gmac1_clkin: external-gmac1-clock {
32 compatible = "fixed-clock";
[all …]
H A Drk3566-radxa-cm3.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/leds/common.h>
18 compatible = "gpio-leds";
20 led-0 {
24 linux,default-trigger = "timer";
25 default-state = "on";
26 pinctrl-names = "default";
27 pinctrl-0 = <&user_led2>;
31 vcc_sys: vcc-sys-regulator {
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Drk3288-veyron-chromebook.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/rockchip,rk808.h>
9 #include <dt-bindings/input/input.h>
10 #include "rk3288-veyron.dtsi"
19 gpio_keys: gpio-keys {
20 pinctrl-0 = <&pwr_key_h &ap_lid_int_l>;
25 linux,input-type = <5>; /* EV_SW */
26 debounce-interval = <1>;
27 gpio-key,wakeup;
31 gpio-charger {
[all …]
H A Drk3288-veyron.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/rockchip,rk808.h>
9 #include <dt-bindings/input/input.h>
18 stdout-path = &uart2;
22 u-boot,dm-pre-reloc;
23 u-boot,boot0 = &spi_flash;
28 pinctrl-names = "default";
29 pinctrl-0 = <&fw_wp_ap>;
30 write-protect-gpio = <&gpio7 6 GPIO_ACTIVE_LOW>;
35 compatible = "pwm-backlight";
[all …]
H A Dsun5i-a13-utoo-p66.dts4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
44 #include "sun5i-a13.dtsi"
45 #include "sun5i-reference-design-tablet.dtsi"
46 #include <dt-bindings/interrupt-controller/irq.h>
50 compatible = "utoo,p66", "allwinner,sun5i-a13";
52 /* The P66 uses the uart pins as gpios */
54 /delete-property/serial0;
58 /delete-property/stdout-path;
63 compatible = "i2c-gpio";
[all …]
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk3288-veyron.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/clock/rockchip,rk808.h>
9 #include <dt-bindings/input/input.h>
18 stdout-path = "serial2:115200n8";
31 power_button: power-button {
32 compatible = "gpio-keys";
33 pinctrl-names = "default";
34 pinctrl-0 = <&pwr_key_l>;
36 key-power {
40 debounce-interval = <100>;
[all …]
H A Drk3188-bqedison2qc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/i2c/i2c.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
14 model = "BQ Edison2 Quad-Core";
15 compatible = "mundoreader,bq-edison2qc", "rockchip,rk3188";
29 compatible = "pwm-backlight";
30 power-supply = <&vsys>;
34 gpio-keys {
[all …]
H A Drk3288-veyron-pinky.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "rk3288-veyron-chromebook.dtsi"
10 #include "../cros-ec-sbs.dtsi"
14 compatible = "google,veyron-pinky-rev2", "google,veyron-pinky",
17 /delete-node/backlight-regulator;
18 /delete-node/panel-regulator;
19 /delete-node/emmc-pwrseq;
20 /delete-node/vcc18-lcd;
24 /delete-property/power-supply;
[all …]
H A Drk3288-veyron-minnie.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "rk3288-veyron-chromebook.dtsi"
10 #include "rk3288-veyron-broadcom-bluetooth.dtsi"
14 compatible = "google,veyron-minnie-rev4", "google,veyron-minnie-rev3",
15 "google,veyron-minnie-rev2", "google,veyron-minnie-rev1",
16 "google,veyron-minnie-rev0", "google,veyron-minnie",
19 volume_buttons: volume-buttons {
20 compatible = "gpio-keys";
21 pinctrl-names = "default";
[all …]
H A Drk3288-veyron-speedy.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "rk3288-veyron-chromebook.dtsi"
10 #include "rk3288-veyron-broadcom-bluetooth.dtsi"
11 #include "../cros-ec-sbs.dtsi"
15 compatible = "google,veyron-speedy-rev9", "google,veyron-speedy-rev8",
16 "google,veyron-speedy-rev7", "google,veyron-speedy-rev6",
17 "google,veyron-speedy-rev5", "google,veyron-speedy-rev4",
18 "google,veyron-speedy-rev3", "google,veyron-speedy-rev2",
19 "google,veyron-speedy", "google,veyron", "rockchip,rk3288";
[all …]
H A Drk3288-veyron-fievel.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "rk3288-veyron.dtsi"
10 #include "rk3288-veyron-analog-audio.dtsi"
14 compatible = "google,veyron-fievel-rev8", "google,veyron-fievel-rev7",
15 "google,veyron-fievel-rev6", "google,veyron-fievel-rev5",
16 "google,veyron-fievel-rev4", "google,veyron-fievel-rev3",
17 "google,veyron-fievel-rev2", "google,veyron-fievel-rev1",
18 "google,veyron-fievel-rev0", "google,veyron-fievel",
22 compatible = "regulator-fixed";
[all …]
H A Drk3288-veyron-jaq.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "rk3288-veyron-chromebook.dtsi"
11 #include "../cros-ec-sbs.dtsi"
15 compatible = "google,veyron-jaq-rev5", "google,veyron-jaq-rev4",
16 "google,veyron-jaq-rev3", "google,veyron-jaq-rev2",
17 "google,veyron-jaq-rev1", "google,veyron-jaq",
22 /* Jaq panel PWM must be >= 3%, so start non-zero brightness at 8 */
23 brightness-levels = <8 255>;
24 num-interpolated-steps = <247>;
[all …]
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Domap3-ha-lcd.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
7 #include "omap3-ha-common.dtsi"
10 model = "TI OMAP3 HEAD acoustics LCD-baseboard with TAO3530 SOM";
11 …compatible = "headacoustics,omap3-ha-lcd", "technexion,omap3-tao3530", "ti,omap3430", "ti,omap34xx…
15 pinctrl-names = "default";
16 pinctrl-0 = <
27 touchscreen_irq_pins: touchscreen-irq-pins {
28 pinctrl-single,pins = <
33 touchscreen_wake_pins: touchscreen-wake-pins {
[all …]
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Ds5pv210-aries.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
32 reserved-memory {
33 #address-cells = <1>;
34 #size-cells = <1>;
38 compatible = "shared-dma-pool";
39 no-map;
44 compatible = "shared-dma-pool";
[all …]
/openbmc/linux/include/sound/
H A Dsoc-jack.h1 /* SPDX-License-Identifier: GPL-2.0
3 * soc-jack.h
12 * struct snd_soc_jack_pin - Describes a pin to update based on jack detection
16 * @invert: if non-zero then pin is enabled when status is not reported
27 * struct snd_soc_jack_zone - Describes voltage zones of jack detection
45 * struct snd_soc_jack_gpio - Describes a gpio pin for jack detection
56 * @wake: enable as wake source
69 bool wake; member
86 struct list_head pins; member
95 struct snd_soc_jack_pin *pins);

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