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/openbmc/linux/Documentation/devicetree/bindings/display/mediatek/
H A Dmediatek,merge.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,merge.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek display merge
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
14 Mediatek display merge, namely MERGE, is used to merge two slice-per-line
15 inputs into one side-by-side output.
16 MERGE device node must be siblings to the central MMSYS_CONFIG node.
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/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/ce/
H A Dgt215.c7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
30 #include <engine/fifo.h>
45 struct nvkm_subdev *subdev = &ce->engine.subdev; in gt215_ce_intr()
46 struct nvkm_device *device = subdev->device; in gt215_ce_intr()
47 const u32 base = subdev->inst * 0x1000; in gt215_ce_intr()
53 const struct nvkm_enum *en = in gt215_ce_intr() local
58 en ? en->name : "", chan ? chan->id : -1, in gt215_ce_intr()
59 chan ? chan->inst->addr : 0, in gt215_ce_intr()
60 chan ? chan->name : "unknown", in gt215_ce_intr()
72 { -1, -1, GT212_DMA },
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/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/sec/
H A Dg98.c7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
25 #include <engine/fifo.h>
45 struct nvkm_subdev *subdev = &sec->engine.subdev; in g98_sec_intr()
46 struct nvkm_device *device = subdev->device; in g98_sec_intr()
52 const struct nvkm_enum *en = in g98_sec_intr() local
57 en ? en->name : "UNKNOWN", chan ? chan->id : -1, in g98_sec_intr()
58 chan ? chan->inst->addr : 0, in g98_sec_intr()
59 chan ? chan->name : "unknown", in g98_sec_intr()
71 { -1, -1, G98_SEC },
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dnv50.c7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
29 #include <engine/fifo.h>
35 return fb->func->ram_new(&fb->base, pram); in nv50_fb_ram_new()
138 struct nvkm_subdev *subdev = &fb->base.subdev; in nv50_fb_intr()
139 struct nvkm_device *device = subdev->device; in nv50_fb_intr()
141 const struct nvkm_enum *en, *re, *cl, *sc; in nv50_fb_intr() local
159 if (device->chipset < 0xa3 || in nv50_fb_intr()
160 device->chipset == 0xaa || device->chipset == 0xac) { in nv50_fb_intr()
173 en = nvkm_enum_find(vm_engine, st0); in nv50_fb_intr()
176 if (cl && cl->data) sc = nvkm_enum_find(cl->data, st3); in nv50_fb_intr()
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/openbmc/linux/drivers/net/ethernet/amd/xgbe/
H A Dxgbe-i2c.c37 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies
97 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies
125 #include "xgbe-common.h"
149 XI2C_IOWRITE_BITS(pdata, IC_ENABLE, EN, 1); in xgbe_i2c_abort()
154 while (wait--) { in xgbe_i2c_abort()
161 return -EBUSY; in xgbe_i2c_abort()
169 while (wait--) { in xgbe_i2c_set_enable()
170 XI2C_IOWRITE_BITS(pdata, IC_ENABLE, EN, mode); in xgbe_i2c_set_enable()
171 if (XI2C_IOREAD_BITS(pdata, IC_ENABLE_STATUS, EN) == mode) in xgbe_i2c_set_enable()
177 return -EBUSY; in xgbe_i2c_set_enable()
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/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
H A Dgk104.c7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
42 struct nvkm_device *device = chan->cgrp->runl->fifo->engine.subdev.device; in gk104_chan_stop()
44 nvkm_mask(device, 0x800004 + (chan->id * 8), 0x00000800, 0x00000800); in gk104_chan_stop()
50 struct nvkm_device *device = chan->cgrp->runl->fifo->engine.subdev.device; in gk104_chan_start()
52 nvkm_mask(device, 0x800004 + (chan->id * 8), 0x00000400, 0x00000400); in gk104_chan_start()
58 struct nvkm_device *device = chan->cgrp->runl->fifo->engine.subdev.device; in gk104_chan_unbind()
60 nvkm_wr32(device, 0x800000 + (chan->id * 8), 0x00000000); in gk104_chan_unbind()
66 struct nvkm_device *device = chan->cgrp->runl->fifo->engine.subdev.device; in gk104_chan_bind_inst()
68 nvkm_wr32(device, 0x800000 + (chan->id * 8), 0x80000000 | chan->inst->addr >> 12); in gk104_chan_bind_inst()
74 struct nvkm_runl *runl = chan->cgrp->runl; in gk104_chan_bind()
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H A Dgf100.c7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
43 nvkm_wr32(chan->cgrp->runl->fifo->engine.subdev.device, 0x002634, chan->id); in gf100_chan_preempt()
49 struct nvkm_device *device = chan->cgrp->runl->fifo->engine.subdev.device; in gf100_chan_stop()
51 nvkm_mask(device, 0x003004 + (chan->id * 8), 0x00000001, 0x00000000); in gf100_chan_stop()
57 struct nvkm_device *device = chan->cgrp->runl->fifo->engine.subdev.device; in gf100_chan_start()
59 nvkm_wr32(device, 0x003004 + (chan->id * 8), 0x001f0001); in gf100_chan_start()
67 struct nvkm_fifo *fifo = chan->cgrp->runl->fifo; in gf100_chan_unbind() local
68 struct nvkm_device *device = fifo->engine.subdev.device; in gf100_chan_unbind()
70 /*TODO: Is this cargo-culted, or necessary? RM does *something* here... Why? */ in gf100_chan_unbind()
71 gf100_fifo_intr_engine(fifo); in gf100_chan_unbind()
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/openbmc/linux/drivers/gpu/drm/mediatek/
H A Dmtk_disp_merge.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/soc/mediatek/mtk-cmdq.h>
87 if (priv->mute_support) in mtk_merge_start_cmdq()
88 mtk_ddp_write(cmdq_pkt, 0x0, &priv->cmdq_reg, priv->regs, in mtk_merge_start_cmdq()
91 mtk_ddp_write(cmdq_pkt, 1, &priv->cmdq_reg, priv->regs, in mtk_merge_start_cmdq()
99 if (priv->mute_support) in mtk_merge_stop_cmdq()
100 mtk_ddp_write(cmdq_pkt, 0x1, &priv->cmdq_reg, priv->regs, in mtk_merge_stop_cmdq()
103 mtk_ddp_write(cmdq_pkt, 0, &priv->cmdq_reg, priv->regs, in mtk_merge_stop_cmdq()
106 if (!cmdq_pkt && priv->async_clk) in mtk_merge_stop_cmdq()
107 reset_control_reset(priv->reset_ctl); in mtk_merge_stop_cmdq()
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/openbmc/qemu/hw/net/
H A Dmsf2-emac.c9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
27 * https://www.microsemi.com/document-portal/cat_view/56661-internal-documents/
28 * 56758-soc?lang=en&limit=20&limitstart=220
35 #include "hw/net/msf2-emac.h"
38 #include "hw/qdev-properties.h"
67 FIELD(DMA_TX_CTL, EN, 0, 1)
74 FIELD(DMA_RX_CTL, EN, 0, 1)
96 uint32_t ier = s->regs[R_DMA_IRQ_MASK]; in emac_get_isr()
97 uint32_t tx = s->regs[R_DMA_TX_STATUS] & 0xF; in emac_get_isr()
98 uint32_t rx = s->regs[R_DMA_RX_STATUS] & 0xF; in emac_get_isr()
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/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/
H A Dnv50.c7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
28 #include <engine/fifo.h>
35 return nvkm_rd32(gr->engine.subdev.device, 0x1540); in nv50_gr_units()
46 int ret = nvkm_gpuobj_new(object->engine->subdev.device, 16, in nv50_gr_object_bind()
50 nvkm_wo32(*pgpuobj, 0x00, object->oclass); in nv50_gr_object_bind()
72 struct nv50_gr *gr = nv50_gr_chan(object)->gr; in nv50_gr_chan_bind()
73 int ret = nvkm_gpuobj_new(gr->base.engine.subdev.device, gr->size, in nv50_gr_chan_bind()
77 nv50_grctx_fill(gr->base.engine.subdev.device, *pgpuobj); in nv50_gr_chan_bind()
96 return -ENOMEM; in nv50_gr_chan_new()
97 nvkm_object_ctor(&nv50_gr_chan, oclass, &chan->object); in nv50_gr_chan_new()
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H A Dgf100.c7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
37 #include <engine/fifo.h>
51 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_zbc_clear_color()
52 if (gr->zbc_color[zbc].format) { in gf100_gr_zbc_clear_color()
53 nvkm_wr32(device, 0x405804, gr->zbc_color[zbc].ds[0]); in gf100_gr_zbc_clear_color()
54 nvkm_wr32(device, 0x405808, gr->zbc_color[zbc].ds[1]); in gf100_gr_zbc_clear_color()
55 nvkm_wr32(device, 0x40580c, gr->zbc_color[zbc].ds[2]); in gf100_gr_zbc_clear_color()
56 nvkm_wr32(device, 0x405810, gr->zbc_color[zbc].ds[3]); in gf100_gr_zbc_clear_color()
58 nvkm_wr32(device, 0x405814, gr->zbc_color[zbc].format); in gf100_gr_zbc_clear_color()
67 struct nvkm_ltc *ltc = gr->base.engine.subdev.device->ltc; in gf100_gr_zbc_color_get()
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/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsmu_v11_0_i2c.c7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
47 static void smu_v11_0_i2c_set_clock_gating(struct i2c_adapter *control, bool en) in smu_v11_0_i2c_set_clock_gating() argument
50 struct amdgpu_device *adev = smu_i2c->adev; in smu_v11_0_i2c_set_clock_gating()
53 reg = REG_SET_FIELD(reg, SMUIO_PWRMGT, i2c_clk_gate_en, en ? 1 : 0); in smu_v11_0_i2c_set_clock_gating()
62 * I2C data transfer mode is 400 kb/s, then t_i2c_poll is 25 us." --
79 struct amdgpu_device *adev = smu_i2c->adev; in smu_v11_0_i2c_enable()
86 for (ii = I2C_MAX_T_POLL_COUNT; ii > 0; ii--) { in smu_v11_0_i2c_enable()
105 struct amdgpu_device *adev = smu_i2c->adev; in smu_v11_0_i2c_clear_status()
116 struct amdgpu_device *adev = smu_i2c->adev; in smu_v11_0_i2c_configure()
124 * 1: standard mode, 0 - 100 Kb/s, in smu_v11_0_i2c_configure()
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/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_display_types.h3 * Copyright (c) 2007-2008 Intel Corporation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
47 #include <media/cec-notifier.h>
69 /* these are outputs from the chip - integrated only
87 HDMI_AUDIO_OFF_DVI = -2, /* no aux data for HDMI-DVI converter */
103 * create the DMA scatter-gather list for each FB color plane. This sg
115 * in the rotated and remapped GTT view all no-CCS formats (up to 2
206 * state. This must be called _after_ display->get_pipe_config has
207 * pre-filled the pipe config. Note that intel_encoder->base.crtc must
422 * and the bus-specific code. What that means is that HDCP over HDMI differs
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/openbmc/linux/drivers/net/ethernet/freescale/enetc/
H A Denetc_ethtool.c1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2 /* Copyright 2017-2019 NXP */
44 struct enetc_hw *hw = &priv->si->hw; in enetc_get_reglen()
48 len += ARRAY_SIZE(enetc_txbdr_regs) * priv->num_tx_rings; in enetc_get_reglen()
49 len += ARRAY_SIZE(enetc_rxbdr_regs) * priv->num_rx_rings; in enetc_get_reglen()
51 if (hw->port) in enetc_get_reglen()
54 if (hw->port && !!(priv->si->hw_features & ENETC_SI_F_QBU)) in enetc_get_reglen()
66 struct enetc_hw *hw = &priv->si->hw; in enetc_get_regs()
76 for (i = 0; i < priv->num_tx_rings; i++) { in enetc_get_regs()
85 for (i = 0; i < priv->num_rx_rings; i++) { in enetc_get_regs()
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/openbmc/linux/
H A Dopengrok0.0.log1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz'
2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz'
3 2024-12-2
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H A Dopengrok1.0.log1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c'
2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms)
3 2024-12-28 20:07:11.899-060
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H A Dopengrok2.0.log1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms)
2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c'
3 2024-12-28 20:05:26.116-060
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/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8195.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/clock/mt8195-clk.h>
9 #include <dt-bindings/gce/mt8195-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8195-memory-port.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>
15 #include <dt-bindings/power/mt8195-power.h>
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/openbmc/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_helpers.c7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
49 return (u32)edid->mfg_id[0] << 24 | in edid_extract_panel_id()
50 (u32)edid->mfg_id[1] << 16 | in edid_extract_panel_id()
64 edid_caps->panel_patch.disable_fams = true; in apply_edid_quirks()
72 edid_caps->panel_patch.remove_sink_ext_caps = true; in apply_edid_quirks()
76 edid_caps->panel_patch.disable_colorimetry = true; in apply_edid_quirks()
84 * dm_helpers_parse_edid_caps() - Parse edid caps
97 struct amdgpu_dm_connector *aconnector = link->priv; in dm_helpers_parse_edid_caps()
98 struct drm_connector *connector = &aconnector->base; in dm_helpers_parse_edid_caps()
99 struct edid *edid_buf = edid ? (struct edid *) edid->raw_edid : NULL; in dm_helpers_parse_edid_caps()
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/openbmc/linux/drivers/usb/gadget/function/
H A Df_ncm.c1 // SPDX-License-Identifier: GPL-2.0+
3 * f_ncm.c -- USB CDC Network (NCM) link function driver
10 * Copyright (C) 2003-2005,2008 David Brownell
30 * NCM is intended to be used with high-speed network attachments.
37 /* to trigger crc/non-crc ndp signature */
71 /* For multi-frame NDP TX */
83 /*-------------------------------------------------------------------------*/
87 * one max-size ethernet frame.
406 .language = 0x0409, /* en-us */
419 * in NDP32 -- 2 16bit words wide. Also signatures are different.
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/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dsienna_cichlid_ppt.c7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
77 if (smu->adev->ip_versions[MP1_HWIP][0] == IP_VERSION(11, 0, 13))\
78 (*member) = (smu->smu_table.driver_pptable + offsetof(PPTable_beige_goby_t, field));\
80 (*member) = (smu->smu_table.driver_pptable + offsetof(PPTable_t, field));\
83 /* STB FIFO depth is in 64bit units */
94 if (smu->adev->ip_versions[MP1_HWIP][0] == IP_VERSION(11, 0, 13)) in get_table_size()
278 struct amdgpu_device *adev = smu->adev; in sienna_cichlid_get_allowed_feature_mask()
281 return -EINVAL; in sienna_cichlid_get_allowed_feature_mask()
306 if (adev->pm.pp_feature & PP_SCLK_DPM_MASK) { in sienna_cichlid_get_allowed_feature_mask()
311 if ((adev->pm.pp_feature & PP_GFX_DCS_MASK) && in sienna_cichlid_get_allowed_feature_mask()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_mode_vba_util_32.c7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
87 p = 3 * wx - w; in dml32_dscceComputeDelay()
91 L = (ax + wx - 1) / wx; in dml32_dscceComputeDelay()
96 Delay = L * wx * (numSlices - 1) + ax + s + lstall + 22; in dml32_dscceComputeDelay()
123 // dscc - input deserializer in dml32_dscComputeDelay()
127 // dscc - input cdc fifo in dml32_dscComputeDelay()
131 // dscc - cdc uncertainty in dml32_dscComputeDelay()
133 // dscc - output cdc fifo in dml32_dscComputeDelay()
137 // dscc - cdc uncertainty in dml32_dscComputeDelay()
139 // dscc - output serializer in dml32_dscComputeDelay()
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/openbmc/linux/drivers/infiniband/hw/hfi1/
H A Dchip.c1 // SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause
3 * Copyright(c) 2015 - 2020 Intel Corporation.
32 MODULE_PARM_DESC(num_vls, "Set number of Virtual Lanes to use (1-8)");
78 #define SEC_SC_HALTED 0x4 /* per-context only */
79 #define SEC_SPC_FREEZE 0x8 /* per-HFI only */
87 * 0 - User Fecn Handling
88 * 1 - Vnic
89 * 2 - AIP
90 * 3 - Verbs
101 #define emulator_rev(dd) ((dd)->irev >> 8)
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/openbmc/
Dopengrok1.0.log1 2025-01-09 03:00:44.932-0600 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler
2 2025-01-09 03:00:45.045-0600 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, -
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Dopengrok2.0.log1 2025-01-08 03:00:39.311-0600 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler
2 2025-01-08 03:00:39.421-0600 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, -
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