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/openbmc/linux/drivers/clk/imx/
H A Dclk-imx31.c35 static const char *csi_sel[] = { "upll", "spll", }; variable
68 clk[csi] = imx_clk_mux("csi_sel", base + MXC_CCM_CCMR, 25, 1, csi_sel, ARRAY_SIZE(csi_sel)); in _mx31_clocks_init()
70 clk[csi_div] = imx_clk_divider("csi_div", "csi_sel", base + MXC_CCM_PDR0, 23, 9); in _mx31_clocks_init()
H A Dclk-imx35.c78 /* 75 */ max_gate, admux_gate, csi_gate, csi_div, csi_sel, iim_gate, enumerator
161 clk[csi_sel] = imx_clk_mux("csi_sel", base + MX35_CCM_PDR2, 7, 1, std_sel, ARRAY_SIZE(std_sel)); in _mx35_clocks_init()
162 clk[csi_div] = imx_clk_divider("csi_div", "csi_sel", base + MX35_CCM_PDR2, 16, 6); in _mx35_clocks_init()
H A Dclk-imx6sl.c302 …hws[IMX6SL_CLK_CSI_SEL] = imx_clk_hw_mux("csi_sel", base + 0x3c, 9, 2, csi_sels… in imx6sl_clocks_init()
333 …hws[IMX6SL_CLK_CSI_PODF] = imx_clk_hw_divider("csi_podf", "csi_sel", b… in imx6sl_clocks_init()
H A Dclk-imx6ul.c287 …hws[IMX6UL_CLK_CSI_SEL] = imx_clk_hw_mux("csi_sel", base + 0x3c, 9, 2, csi_sels, ARRAY_SIZE(csi… in imx6ul_clocks_init()
337 …hws[IMX6UL_CLK_CSI_PODF] = imx_clk_hw_divider("csi_podf", "csi_sel", base + 0… in imx6ul_clocks_init()
H A Dclk-imx6sx.c300 …hws[IMX6SX_CLK_CSI_SEL] = imx_clk_hw_mux("csi_sel", base + 0x3c, 9, 2, … in imx6sx_clocks_init()
350 …hws[IMX6SX_CLK_CSI_PODF] = imx_clk_hw_divider("csi_podf", "csi_sel", bas… in imx6sx_clocks_init()
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dimx31-clock.yaml32 csi_sel 13
H A Dimx35-clock.yaml98 csi_sel 79