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/openbmc/phosphor-power/org/open_power/Witherspoon/
H A DFault.errors.yaml28 description: Read CPLD-register fail
31 description: CPLD's error reason is PSU0_PGOOD fail
34 description: CPLD's error reason is PSU1_PGOOD fail
37 description: CPLD's error reason is 240Va_Fault_A fail
40 description: CPLD's error reason is 240Va_Fault_B fail
43 description: CPLD's error reason is 240Va_Fault_C fail
46 description: CPLD's error reason is 240Va_Fault_D fail
49 description: CPLD's error reason is 240Va_Fault_E fail
52 description: CPLD's error reason is 240Va_Fault_F fail
55 description: CPLD's error reason is 240Va_Fault_G fail
[all …]
/openbmc/openbmc-test-automation/oem/nuvoton/
H A Dtest_jtag_master.robot17 Test Read CPLD ID
18 [Documentation] Test Read CPLD ID.
28 Test Program CPLD
29 [Documentation] Test Program CPLD.
32 Pass Execution If ${wrong_cpld}==1 Wrong CPLD chip
33 Pass Execution If ${program_cpld}==0 skip programming cpld
35 Program CPLD ${cpld_firmware2} ${firmware_version2}
36 Program CPLD ${cpld_firmware1} ${firmware_version1}
72 ${cpld_firmware1}= Set Variable ${olympus_json["npcm7xx"]["cpld"]["fw1"]}
73 ${cpld_firmware2}= Set Variable ${olympus_json["npcm7xx"]["cpld"]["fw2"]}
[all …]
/openbmc/openbmc/meta-ampere/meta-mitchell/recipes-ampere/platform/ampere-utils/
H A Dampere_firmware_upgrade.sh13 # Syntax for Mainboard CPLD:
16 # Syntax for BMC CPLD:
19 # Syntax for Backplane CPLD:
113 echo "Flashing MB CPLD"
124 echo "Flashing BMC CPLD"
135 echo "Flashing Front Backplane 1 CPLD"
138 echo "Flashing Front Backplane 2 CPLD"
141 echo "Flashing Front Backplane 3 CPLD"
144 echo "Flashing Rear Backplane 1 CPLD"
147 echo "Flashing Rear Backplane 2 CPLD"
[all …]
/openbmc/linux/Documentation/devicetree/bindings/board/
H A Dfsl-board.txt45 cpld@3,0 {
67 * Freescale on-board CPLD
69 Some Freescale boards like T1040RDB have an on board CPLD connected.
72 - compatible: Should be a board-specific string like "fsl,<board>-cpld"
74 "fsl,t1040rdb-cpld", "fsl,t1042rdb-cpld", "fsl,t1042rdb_pi-cpld"
75 - reg: should describe CPLD registers
78 cpld@3,0 {
79 compatible = "fsl,t1040rdb-cpld";
/openbmc/linux/drivers/leds/
H A Dleds-mlxcpld.c68 * @offset: offset for LED access in CPLD device
69 * @mask: mask for LED access in CPLD device
81 * @param: LED CPLD access parameters
92 * @offset: offset for LED access in CPLD device
93 * @mask: mask for LED access in CPLD device
264 * CPLD register. Register offset is specified by off parameter. in mlxcpld_led_store_hw()
327 struct mlxcpld_led_pdata *cpld) in mlxcpld_led_config() argument
332 cpld->pled = devm_kcalloc(dev, in mlxcpld_led_config()
333 cpld->num_led_instances, in mlxcpld_led_config()
336 if (!cpld->pled) in mlxcpld_led_config()
[all …]
/openbmc/linux/Documentation/leds/
H A Dleds-mlxcpld.rst28 - CPLD reg offset: 0x20
32 - CPLD reg offset: 0x20
36 - CPLD reg offset: 0x21
40 - CPLD reg offset: 0x21
44 - CPLD reg offset: 0x22
48 - CPLD reg offset: 0x22
77 - CPLD reg offset: 0x20
81 - CPLD reg offset: 0x21
85 - CPLD reg offset: 0x23
89 - CPLD reg offset: 0x23
[all …]
/openbmc/u-boot/board/freescale/p2041rdb/
H A Dcpld.h11 * CPLD register set. Feel free to add board-specific #ifdefs where necessary.
14 u8 cpld_ver; /* 0x0 - CPLD Major Revision Register */
15 u8 cpld_ver_sub; /* 0x1 - CPLD Minor Revision Register */
44 /* Pointer to the CPLD register set */
45 #define cpld ((cpld_data_t *)CPLD_BASE) macro
47 /* The CPLD SW register that corresponds to board switch X, where x >= 1 */
48 #define CPLD_SW(x) (cpld->sw[(x) - 2])
/openbmc/linux/arch/powerpc/platforms/85xx/
H A Dksi8560.c52 printk(KERN_ERR "Can't find CPLD base, hang forever\n"); in machine_restart()
129 struct device_node *cpld; in ksi8560_setup_arch() local
131 cpld = of_find_compatible_node(NULL, NULL, "emerson,KSI8560-cpld"); in ksi8560_setup_arch()
132 if (cpld) in ksi8560_setup_arch()
133 cpld_base = of_iomap(cpld, 0); in ksi8560_setup_arch()
135 printk(KERN_ERR "Can't find CPLD in device tree\n"); in ksi8560_setup_arch()
137 of_node_put(cpld); in ksi8560_setup_arch()
161 seq_printf(m, "CPLD rev\t: %d\n", in ksi8560_show_cpuinfo()
164 seq_printf(m, "Unknown Hardware and CPLD revs\n"); in ksi8560_show_cpuinfo()
/openbmc/phosphor-buttons/inc/
H A Dbutton_config.hpp3 #include "cpld.hpp"
13 cpld enumerator
22 CpldInfo cpld; // holds single cpld config member
24 // mapped with the gpio or cpld
/openbmc/linux/arch/powerpc/platforms/512x/
H A Dmpc5121_ads_cpld.c8 * MPC5121ADS CPLD irq handling
79 .name = "CPLD PIC",
146 np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121ads-cpld-pic"); in mpc5121_ads_cpld_map()
148 printk(KERN_ERR "CPLD PIC init: can not find cpld-pic node\n"); in mpc5121_ads_cpld_map()
164 np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121ads-cpld-pic"); in mpc5121_ads_cpld_pic_init()
166 printk(KERN_ERR "CPLD PIC init: can not find cpld-pic node\n"); in mpc5121_ads_cpld_pic_init()
191 printk(KERN_ERR "CPLD PIC: failed to allocate irq host!\n"); in mpc5121_ads_cpld_pic_init()
/openbmc/u-boot/board/freescale/t4rdb/
H A Dcpld.c7 * This file provides support for the board-specific CPLD used on some Freescale
13 * CPLD register map
21 #include "cpld.h"
57 printf("CPLD Altbank Fail: Invalid value!\n"); in cpld_set_altbank()
121 cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
124 "cpld reset altbank - reset to alternate bank\n"
126 "cpld dump - display the CPLD registers\n"
H A Dcpld.h12 * CPLD register set. Feel free to add board-specific #ifdefs where necessary.
15 u8 chip_id1; /* 0x00 - CPLD Chip ID1 Register */
16 u8 chip_id2; /* 0x01 - CPLD Chip ID2 Register */
17 u8 sw_maj_ver; /* 0x02 - CPLD Code Major Version Register */
18 u8 sw_min_ver; /* 0x03 - CPLD Code Minor Version Register */
40 /* Pointer to the CPLD register set */
/openbmc/openbmc/meta-ampere/meta-jefferson/recipes-ampere/platform/ampere-utils/
H A Dampere_firmware_upgrade.sh12 # Syntax for Mainboard CPLD:
15 # Syntax for BMC CPLD:
93 echo "Flashing MB CPLD"
104 echo "Flashing BMC CPLD"
119 echo " - Flash Mainboard CPLD"
121 echo " - Flash BMC CPLD (only for DC-SCM BMC board)"
141 # Run Mainboard CPLD update
144 # Run CPLD BMC update
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Ddelta,tn48m-cpld.yaml4 $id: http://devicetree.org/schemas/mfd/delta,tn48m-cpld.yaml#
7 title: Delta Networks TN48M CPLD controller
13 Lattice CPLD onboard the TN48M switches is used for system
24 const: delta,tn48m-cpld
58 cpld@41 {
59 compatible = "delta,tn48m-cpld";
/openbmc/u-boot/board/LaCie/net2big_v2/
H A Dnet2big_v2.c23 #include "../common/cpld-gpio-bus.h"
55 MPP29_GPIO, /* CPLD GPIO bus ALE */ in board_early_init_f()
61 MPP44_GPIO, /* CPLD GPIO bus (data 0) */ in board_early_init_f()
62 MPP45_GPIO, /* CPLD GPIO bus (data 1) */ in board_early_init_f()
63 MPP46_GPIO, /* CPLD GPIO bus (data 2) */ in board_early_init_f()
64 MPP47_GPIO, /* CPLD GPIO bus (addr 0) */ in board_early_init_f()
65 MPP48_GPIO, /* CPLD GPIO bus (addr 1) */ in board_early_init_f()
66 MPP49_GPIO, /* CPLD GPIO bus (addr 2) */ in board_early_init_f()
139 * CPLD GPIO bus:
159 * The LEDs are controlled by a CPLD and can be configured through
[all …]
/openbmc/u-boot/board/freescale/t104xrdb/
H A Dcpld.c5 * This file provides support for the board-specific CPLD used on some Freescale
10 * CONFIG_SYS_CPLD_BASE-The virtual address of the base of the CPLD register map
17 #include "cpld.h"
108 cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
111 "cpld reset altbank - reset to alternate bank\n"
113 "cpld dump - display the CPLD registers\n"
/openbmc/phosphor-power/power-sequencer/
H A Dmihawk-cpld.hpp20 * This class implements fault analysis for Mihawk's CPLD
63 * to read CPLD-error-code-register
68 * ex.Mihawk's CPLD-register is on slaveAddr ox40 of
74 * CPLD-error-code-register.
80 * CPLD-power_on-error-interrupt-bit-register
88 * Clear CPLD intrupt record after reading CPLD_register.
94 * CPLD-power_ready-error-interrupt-bit-register
117 * The parameter which is checked CPLD's the same error
126 * which are read on CPLD-error-code-register.
130 * Read CPLD-error-code-register fail.
/openbmc/u-boot/board/freescale/ls1043ardb/
H A Dcpld.c5 * Freescale LS1043ARDB board-specific CPLD controlling supports.
11 #include "cpld.h"
164 cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
167 "cpld reset altbank: reset to alternate bank\n"
168 "cpld reset nand: reset to boot from NAND flash\n"
169 "cpld reset sd: reset to boot from SD card\n"
171 "cpld dump - display the CPLD registers\n"
/openbmc/openbmc/meta-facebook/meta-catalina/recipes-phosphor/gpio/phosphor-gpio-monitor/
H A Dcatalina-gpio-monitor67 # PDB CPLD IOEXP, 14-0010, Port 0
85 # PDB CPLD IOEXP, 14-0010, Port 1
103 # PDB CPLD IOEXP 14-0011, Port 0
121 # PDB CPLD IOEXP 14-0011, Port 1
129 # PDB CPLD IOEXP 14-0012, Port 0
147 # PDB CPLD IOEXP 14-0012, Port 1
173 # PDB CPLD IOEXP, 14-0010, Port 0
191 # PDB CPLD IOEXP, 14-0010, Port 1
209 # PDB CPLD IOEXP 14-0011, Port 0
227 # PDB CPLD IOEXP 14-0011, Port 1
[all …]
/openbmc/openbmc/meta-facebook/meta-greatlakes/recipes-phosphor/state/phosphor-state-manager/
H A Dpower-ctrl-init8 "fan0-bmc-cpld-enable"
9 "fan1-bmc-cpld-enable"
10 "fan2-bmc-cpld-enable"
11 "fan3-bmc-cpld-enable"
/openbmc/u-boot/board/freescale/ls1046ardb/
H A Dcpld.h10 * CPLD register set of LS1046ARDB board-specific.
11 * CPLD Revision: V2.1
14 u8 cpld_ver; /* 0x0 - CPLD Major Revision Register */
15 u8 cpld_ver_sub; /* 0x1 - CPLD Minor Revision Register */
43 /* CPLD on IFC */
H A Dcpld.c5 * Freescale LS1046ARDB board-specific CPLD controlling supports.
11 #include "cpld.h"
158 cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
161 "cpld reset altbank: reset to alternate bank\n"
162 "cpld reset sd: reset to boot from SD card\n"
164 "cpld dump - display the CPLD registers\n"
/openbmc/openbmc/meta-quanta/meta-gbs/recipes-gbs/cpld-ver-check/
H A Dgbs-cpld-ver-check.bb1 DESCRIPTION = "Report CPLD Version"
9 file://cpld-version.service \
18 SYSTEMD_SERVICE:${PN} = "cpld-version.service"
25 install -m 0644 ${S}/cpld-version.service ${D}${systemd_system_unitdir}
/openbmc/u-boot/board/freescale/t102xrdb/
H A Dcpld.c5 * Freescale T1024RDB board-specific CPLD controlling supports.
13 #include "cpld.h"
97 cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
100 "cpld reset altbank - reset to alternate bank\n"
101 "cpld dump - display the CPLD registers\n"
/openbmc/openbmc/meta-facebook/meta-catalina/recipes-phosphor/state/phosphor-state-manager/
H A Dpower-cmd37 # Try i2ctransfer to get cpld version, echo empty string if failed
53 # unable to get pdb cpld version
55 echo "[DEBUG] unable to get pdb cpld version"
60 # unable to check rmc main power state with pdb cpld version less than 0x10000
62 echo "[DEBUG] pdb cpld version less than 0x10000"
67 # failed to get rmc main power state from cpld register
69 echo "[DEBUG] failed to get rmc main power state from cpld register"

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