| /openbmc/u-boot/arch/x86/include/asm/ |
| H A D | early_cmos.h | 9 /* CMOS actually resides in the RTC SRAM */
15 * This reads from CMOS for the 8-bit data stored at the given address.
25 * This reads from CMOS for the 16-bit data stored at the given address.
35 * This reads from CMOS for the 32-bit data stored at the given address.
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| H A D | u-boot-x86.h | 60 * fsp_save_s3_stack() - save stack address to CMOS for next S3 boot
63 * to CMOS and use it as the stack on next S3 boot for fsp_init()
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| H A D | cmos_layout.h | 16 * For simplicity in U-Boot we only support CMOS in the standard bank, and
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| /openbmc/u-boot/arch/x86/lib/fsp/ |
| H A D | fsp_common.c | 97 /* Save the stack address to CMOS */ in fsp_save_s3_stack()
100 debug("Save stack address to CMOS: err=%d\n", ret); in fsp_save_s3_stack()
142 * CMOS access library which does not depend on DM. in arch_fsp_init()
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| /openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Control/Boot/ |
| H A D | Flags.interface.yaml | 8 Whether or not CMOS Clear is enabled.
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| /openbmc/u-boot/arch/x86/cpu/ivybridge/ |
| H A D | sdram.c | 69 * Read scrambler seeds from CMOS RAM. We don't want to store them in in read_seed_from_cmos()
71 * the flash too much. So we store these in CMOS and the large MRC in read_seed_from_cmos()
84 debug("Read scrambler seed 0x%08x from CMOS 0x%02x\n", in read_seed_from_cmos()
86 debug("Read S3 scrambler seed 0x%08x from CMOS 0x%02x\n", in read_seed_from_cmos()
146 /* Save the MRC seed values to CMOS */ in write_seeds_to_cmos()
148 debug("Save scrambler seed 0x%08x to CMOS 0x%02x\n", in write_seeds_to_cmos()
152 debug("Save s3 scrambler seed 0x%08x to CMOS 0x%02x\n", in write_seeds_to_cmos()
548 debug("Failed to write seeds to CMOS: %d\n", ret); in dram_init()
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| H A D | model_206ax.c | 406 /* Enable virtualization if enabled in CMOS */ in model_206ax_init()
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| /openbmc/qemu/hw/rtc/ |
| H A D | mc146818rtc.c | 125 DPRINTF_C("cmos: injecting from timer\n"); in rtc_coalesced_timer()
128 DPRINTF_C("cmos: coalesced irqs decreased to %d\n", in rtc_coalesced_timer()
208 DPRINTF_C("cmos: coalesced irqs scaled from %d to %d, " in periodic_timer_update()
242 DPRINTF_C("cmos: coalesced irqs increased to %d\n", in rtc_periodic_timer()
442 CMOS_DPRINTF("cmos: write index=0x%02x val=0x%02" PRIx64 "\n", in cmos_ioport_write()
509 /* update cmos to when the rtc was stopping */ in cmos_ioport_write()
691 /* if not in set mode, calibrate cmos before in cmos_ioport_read()
717 DPRINTF_C("cmos: injecting on ack\n"); in cmos_ioport_read()
720 DPRINTF_C("cmos: coalesced irqs decreased to %d\n", in cmos_ioport_read()
729 CMOS_DPRINTF("cmos: read index=0x%02x val=0x%02x\n", in cmos_ioport_read()
[all …]
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| /openbmc/qemu/tests/qtest/ |
| H A D | fdc-test.c | 267 uint8_t cmos; in test_cmos() local
269 cmos = cmos_read(CMOS_FLOPPY); in test_cmos()
270 g_assert(cmos == 0x40 || cmos == 0x50); in test_cmos()
621 qtest_add_func("/fdc/cmos", test_cmos); in main()
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| /openbmc/u-boot/arch/x86/lib/ |
| H A D | early_cmos.c | 7 * This library provides CMOS (inside RTC SRAM) access routines at a very
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| /openbmc/u-boot/cmd/ |
| H A D | cbfs.c | 164 type_name = "cmos default"; in do_cbfs_ls()
173 type_name = "cmos layout"; in do_cbfs_ls()
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| /openbmc/qemu/include/hw/rtc/ |
| H A D | mc146818rtc_regs.h | 49 /* PC cmos mappings */
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| /openbmc/u-boot/drivers/rtc/ |
| H A D | mc146818.c | 22 /* Set this to 1 to clear the CMOS RAM */
183 printf("RTC: zeroing CMOS RAM\n"); in mc146818_init()
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| H A D | Kconfig | 38 The PCF2127 is a CMOS Real Time Clock (RTC) and calendar with an integrated
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| /openbmc/u-boot/arch/x86/cpu/intel_common/ |
| H A D | cpu.c | 49 /* Enable upper 128bytes of CMOS */ in cpu_common_init()
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| /openbmc/u-boot/arch/x86/include/asm/arch-ivybridge/ |
| H A D | pei_data.h | 55 /* Seed values saved in CMOS */
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| /openbmc/qemu/hw/block/ |
| H A D | fdc-internal.h | 73 FloppyDriveType drive; /* CMOS drive type */
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| /openbmc/qemu/stubs/ |
| H A D | meson.build | 75 stub_ss.add(files('cmos.c'))
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| /openbmc/u-boot/include/linux/ |
| H A D | mc146818rtc.h | 1 /* mc146818rtc.h - register definitions for the Real-Time-Clock / CMOS RAM
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| /openbmc/pldm/oem/meta/event/ |
| H A D | types.hpp | 170 {"System PXE boot fail", "CMOS/NVRAM configuration cleared",
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| /openbmc/u-boot/arch/x86/cpu/ |
| H A D | cpu.c | 275 * Save stack address to CMOS so that at next S3 boot, in reserve_arch()
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| /openbmc/ipmitool/lib/ |
| H A D | ipmi_chassis.c | 645 printf(" - CMOS Clear\n"); in ipmi_chassis_get_bootparam()
1272 lprintf(LOG_NOTICE, "bootdev <device> [clear-cmos=yes|no]"); in ipmi_chassis_main()
1285 else if (strncmp(argv[2], "clear-cmos=", 11) == 0) { in ipmi_chassis_main()
1312 {"clear-cmos", 1, (1<<7), (1<<7), in ipmi_chassis_main()
1313 "CMOS clear"}, in ipmi_chassis_main()
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| /openbmc/smbios-mdr/include/ |
| H A D | dimm.hpp | 241 "CMOS", "EDO", "Window DRAM", "Cache DRAM",
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| /openbmc/qemu/hw/i386/ |
| H A D | pc.c | 315 /* PC cmos mappings */
459 * Locate the FDC at IO address 0x3f0, in order to configure the CMOS registers
476 error_printf("the one being picked for CMOS setup might not reflect " in pc_find_fdc0()
526 /* various important CMOS locations needed by PC/Bochs bios */ in pc_cmos_init_late()
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| /openbmc/ipmitool/ |
| H A D | ChangeLog | 256 chassis bootdev bios clear-cmos=yes
257 will correctly clear the bios cmos.
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