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Searched defs:reg_name (Results 26 – 50 of 263) sorted by relevance

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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn301/
H A Ddcn301_hubbub.c37 #define FN(reg_name, field_name) \ argument
47 #define FN(reg_name, field_name) \ argument
/openbmc/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn10/
H A Dhw_translate_dcn10.c51 #define REG(reg_name)\ argument
54 #define REGI(reg_name, block, id)\ argument
/openbmc/linux/drivers/gpu/drm/amd/display/dc/gpio/dce120/
H A Dhw_translate_dce120.c51 #define REG(reg_name)\ argument
54 #define REGI(reg_name, block, id)\ argument
/openbmc/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn21/
H A Dhw_translate_dcn21.c55 #define REG(reg_name)\ argument
57 #define SF_HPD(reg_name, field_name, post_fix)\ argument
/openbmc/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn30/
H A Dhw_translate_dcn30.c60 #define REG(reg_name)\ argument
62 #define SF_HPD(reg_name, field_name, post_fix)\ argument
/openbmc/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn20/
H A Dhw_translate_dcn20.c55 #define REG(reg_name)\ argument
57 #define SF_HPD(reg_name, field_name, post_fix)\ argument
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_dwb.h34 #define SR(reg_name)\ argument
38 #define SRI(reg_name, block, id)\ argument
43 #define SRII(reg_name, block, id)\ argument
47 #define SF(reg_name, field_name, post_fix)\ argument
H A Ddcn10_link_encoder.c45 #define FN(reg_name, field_name) \ argument
1363 #define HPD_REG_READ(reg_name) \ argument
1366 #define HPD_REG_UPDATE_N(reg_name, n, ...) \ argument
1371 #define HPD_REG_UPDATE(reg_name, field, val) \ argument
1394 #define AUX_REG_READ(reg_name) \ argument
1397 #define AUX_REG_UPDATE_N(reg_name, n, ...) \ argument
1402 #define AUX_REG_UPDATE(reg_name, field, val) \ argument
H A Ddcn10_resource.c108 #define SR(reg_name)\ argument
112 #define SRI(reg_name, block, id)\ argument
117 #define SRII(reg_name, block, id)\ argument
121 #define VUPDATE_SRII(reg_name, block, id)\ argument
126 #define SFRB(field_name, reg_name, bitfield, post_fix)\ argument
136 #define NBIO_SR(reg_name)\ argument
147 #define MMHUB_SR(reg_name)\ argument
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn316/
H A Ddcn316_resource.c149 #define SR(reg_name)\ argument
153 #define SRI(reg_name, block, id)\ argument
157 #define SRI2(reg_name, block, id)\ argument
161 #define SRIR(var_name, reg_name, block, id)\ argument
165 #define SRII(reg_name, block, id)\ argument
169 #define SRII_MPC_RMU(reg_name, block, id)\ argument
173 #define SRII_DWB(reg_name, temp_name, block, id)\ argument
177 #define SF_DWB2(reg_name, block, id, field_name, post_fix) \ argument
180 #define DCCG_SRII(reg_name, block, id)\ argument
184 #define VUPDATE_SRII(reg_name, block, id)\ argument
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn32/
H A Dhw_translate_dcn32.c53 #define REG(reg_name)\ argument
55 #define SF_HPD(reg_name, field_name, post_fix)\ argument
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn201/
H A Ddcn201_hubbub.c40 #define FN(reg_name, field_name) \ argument
50 #define FN(reg_name, field_name) \ argument
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn21/
H A Ddcn21_resource.c101 #define SR(reg_name)\ argument
105 #define SRI(reg_name, block, id)\ argument
109 #define SRIR(var_name, reg_name, block, id)\ argument
113 #define SRII(reg_name, block, id)\ argument
117 #define DCCG_SRII(reg_name, block, id)\ argument
121 #define VUPDATE_SRII(reg_name, block, id)\ argument
132 #define NBIO_SR(reg_name)\ argument
143 #define MMHUB_SR(reg_name)\ argument
1360 #define REG(reg_name) \ argument
/openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/
H A Dreg_helper.h39 #define REG_READ(reg_name) \ argument
42 #define REG_WRITE(reg_name, value) \ argument
54 #define REG_SET_N(reg_name, n, initial_val, ...) \ argument
60 #define FN(reg_name, field) \ argument
63 #define REG_SET(reg_name, initial_val, field, val) \ argument
156 #define REG_GET(reg_name, field, val) \ argument
160 #define REG_GET_2(reg_name, f1, v1, f2, v2) \ argument
165 #define REG_GET_3(reg_name, f1, v1, f2, v2, f3, v3) \ argument
171 #define REG_GET_4(reg_name, f1, v1, f2, v2, f3, v3, f4, v4) \ argument
225 #define REG_UPDATE_N(reg_name, n, ...) \ argument
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_resource.c115 #define SR(reg_name)\ argument
119 #define SRI(reg_name, block, id)\ argument
123 #define SRI2(reg_name, block, id)\ argument
131 #define SRII(reg_name, block, id)\ argument
135 #define SRII_MPC_RMU(reg_name, block, id)\ argument
146 #define DCCG_SRII(reg_name, block, id)\ argument
150 #define VUPDATE_SRII(reg_name, block, id)\ argument
161 #define NBIO_SR(reg_name)\ argument
172 #define MMHUB_SR(reg_name)\ argument
183 #define CLK_SRI(reg_name, block, inst)\ argument
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/gpio/dce80/
H A Dhw_factory_dce80.c41 #define REG(reg_name)\ argument
83 #define SF_DDC(reg_name, field_name, post_fix)\ argument
/openbmc/linux/drivers/gpu/drm/amd/display/dc/gpio/dce60/
H A Dhw_factory_dce60.c41 #define REG(reg_name)\ argument
83 #define SF_DDC(reg_name, field_name, post_fix)\ argument
/openbmc/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn315/
H A Dhw_translate_dcn315.c55 #define REG(reg_name)\ argument
57 #define SF_HPD(reg_name, field_name, post_fix)\ argument
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn315/
H A Ddcn315_resource.c161 #define SR(reg_name)\ argument
165 #define SRI(reg_name, block, id)\ argument
169 #define SRI2(reg_name, block, id)\ argument
173 #define SRIR(var_name, reg_name, block, id)\ argument
177 #define SRII(reg_name, block, id)\ argument
181 #define SRII_MPC_RMU(reg_name, block, id)\ argument
185 #define SRII_DWB(reg_name, temp_name, block, id)\ argument
189 #define SF_DWB2(reg_name, block, id, field_name, post_fix) \ argument
192 #define DCCG_SRII(reg_name, block, id)\ argument
196 #define VUPDATE_SRII(reg_name, block, id)\ argument
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce60/
H A Ddce60_clk_mgr.c50 #define FN(reg_name, field_name) \ argument
54 #define SR(reg_name)\ argument
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_link_encoder.c45 #define FN(reg_name, field_name) \ argument
303 #define AUX_REG_READ(reg_name) \ argument
306 #define AUX_REG_WRITE(reg_name, val) \ argument
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/
H A Ddcn201_clk_mgr.c49 #define SR(reg_name)\ argument
57 #define FN(reg_name, field_name) \ argument
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/
H A Ddce112_clk_mgr.c37 #define SR(reg_name)\ argument
41 #define SRI(reg_name, block, id)\ argument
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/
H A Ddcn31_dio_link_encoder.c51 #define FN(reg_name, field_name) \ argument
60 #define AUX_REG_READ(reg_name) \ argument
63 #define AUX_REG_WRITE(reg_name, val) \ argument
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/
H A Ddce110_clk_mgr.c35 #define SR(reg_name)\ argument
39 #define SRI(reg_name, block, id)\ argument

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