Home
last modified time | relevance | path

Searched defs:pll_rate (Results 1 – 24 of 24) sorted by relevance

/openbmc/linux/drivers/gpu/drm/msm/hdmi/
H A Dhdmi_pll_8960.c30 struct pll_rate { struct
40 static const struct pll_rate freqtbl[] = { argument
379 const struct pll_rate *pll_rate = find_rate(rate); in hdmi_pll_round_rate() local
388 const struct pll_rate *pll_rate = find_rate(rate); in hdmi_pll_set_rate() local
/openbmc/linux/drivers/gpu/drm/msm/disp/mdp4/
H A Dmdp4_lvds_pll.c25 struct pll_rate { struct
34 static const struct pll_rate freqtbl[] = { argument
61 const struct pll_rate *pll_rate = find_rate(lvds_pll->pixclk); in mpd4_lvds_pll_enable() local
104 const struct pll_rate *pll_rate = find_rate(rate); in mpd4_lvds_pll_round_rate() local
/openbmc/u-boot/cmd/aspeed/
H A Dplltest.c56 static int cal_ast2600_28nm_pll_rate(unsigned long pll_rate, unsigned int pll_idx) in cal_ast2600_28nm_pll_rate()
120 static int cal_ast2600_13nm_pll_rate(unsigned long pll_rate, unsigned int pll_idx) in cal_ast2600_13nm_pll_rate()
188 unsigned long pll_rate = 0; in do_ast2600_pll_test() local
/openbmc/linux/arch/arm/mach-omap1/
H A Dopp.h18 unsigned long pll_rate; member
/openbmc/u-boot/drivers/clk/
H A Dclk-hsdk-cgu.c136 const u32 pll_rate[MAX_TUN_CLOCKS]; member
156 const u32 pll_rate[MAX_AXI_CLOCKS]; member
538 ulong pll_rate; in axi_clk_set() local
576 ulong pll_rate; in tun_clk_set() local
H A Dclk_zynq.c288 ulong pll_rate, in zynq_clk_calc_peripheral_two_divs()
319 ulong pll_rate, new_rate; in zynq_clk_set_peripheral_rate() local
H A Dclk_zynqmp.c494 ulong pll_rate, in zynqmp_clk_calc_peripheral_two_divs()
525 ulong pll_rate, new_rate; in zynqmp_clk_set_peripheral_rate() local
/openbmc/u-boot/drivers/clk/rockchip/
H A Dclk_rv1108.c146 ulong pll_rate; in rv1108_mac_set_clk() local
171 u32 pll_rate; in rv1108_sfc_set_clk() local
509 u32 pll_rate; in rv1108_mmc_set_clk() local
H A Dclk_rk3368.c160 u32 pll_rate; in rk3368_mmc_get_clk() local
325 ulong pll_rate; in rk3368_gmac_set_clk() local
H A Dclk_rk322x.c252 ulong pll_rate; in rk322x_mac_set_clk() local
H A Dclk_rk3328.c419 ulong pll_rate; in rk3328_gmac2io_set_clk() local
H A Dclk_rk3288.c311 ulong pll_rate; in rockchip_mac_set_clk() local
/openbmc/linux/sound/soc/samsung/
H A Dsnow.c30 static const unsigned int pll_rate[] = { in snow_card_hw_params() local
/openbmc/linux/drivers/phy/mediatek/
H A Dphy-mtk-hdmi.h35 unsigned long pll_rate; member
/openbmc/linux/sound/soc/codecs/
H A Dpcm512x.c750 unsigned long pll_rate) in pcm512x_find_pll_coeff()
894 unsigned long pll_rate; in pcm512x_set_dividers() local
H A Dadau17x1.c439 unsigned int pll_rate; in adau17x1_auto_pll() local
/openbmc/linux/drivers/clk/spear/
H A Dclk-vco-pll.c67 unsigned long prate, int index, unsigned long *pll_rate) in pll_calc_rate()
/openbmc/linux/sound/pci/ctxfi/
H A Dctatc.h78 unsigned int pll_rate; /* current rate of Phase Lock Loop */ member
/openbmc/linux/sound/soc/ti/
H A Dj721e-evm.c560 unsigned int min_rate, max_rate, pll_rate; in j721e_calculate_rate_range() local
/openbmc/u-boot/arch/arm/mach-tegra/
H A Dclock.c25 static unsigned pll_rate[CLOCK_ID_COUNT]; variable
/openbmc/linux/drivers/media/i2c/
H A Dtc358746.c159 unsigned long pll_rate; member
1092 unsigned long pll_rate = tc358746->pll_rate; in tc358746_find_mclk_settings() local
/openbmc/linux/drivers/clk/
H A Dclk-cdce925.c419 long pll_rate = clk_round_rate(pll, target_rate); in cdce925_clk_best_parent_rate() local
/openbmc/linux/drivers/gpu/drm/mediatek/
H A Dmtk_dpi.c515 unsigned long pll_rate; in mtk_dpi_set_display_mode() local
/openbmc/linux/drivers/mfd/
H A Ddb8500-prcmu.c1395 static unsigned long pll_rate(void __iomem *reg, unsigned long src_rate, in pll_rate() function