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Searched defs:mdiv (Results 1 – 6 of 6) sorted by relevance

/openbmc/u-boot/arch/arm/mach-socfpga/
H A Dclock_manager_s10.c48 u32 mdiv, refclkdiv, mscnt, hscnt, vcocalib; in cm_basic_init() local
175 unsigned long fref, refdiv, mdiv, reg, vco; in cm_get_main_vco_clk_hz() local
206 unsigned long fref, refdiv, mdiv, reg, vco; in cm_get_per_vco_clk_hz() local
/openbmc/u-boot/drivers/clk/exynos/
H A Dclk-pll.c22 unsigned long mdiv, sdiv, pdiv; in pll145x_get_rate() local
/openbmc/u-boot/board/samsung/trats/
H A Dsetup.h229 #define SET_PLL(mdiv, pdiv, sdiv) ((ENABLE << 31)\ argument
/openbmc/u-boot/arch/arm/mach-exynos/
H A Dexynos4_setup.h340 #define SET_PLL(mdiv, pdiv, sdiv) ((ENABLE << 31)\ argument
H A Dexynos5_setup.h22 #define set_pll(mdiv, pdiv, sdiv) (1<<31 | mdiv<<16 | pdiv<<8 | sdiv) argument
/openbmc/u-boot/arch/arm/include/asm/arch-tegra/
H A Dbpmp_abi.h1367 uint16_t mdiv; /**< input divider value */ member