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/openbmc/linux/drivers/clk/sprd/
H A Dcomposite.h21 #define SPRD_COMP_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, _table, \ argument
35 #define SPRD_COMP_CLK_TABLE(_struct, _name, _parent, _reg, _table, \ argument
41 #define SPRD_COMP_CLK(_struct, _name, _parent, _reg, _mshift, \ argument
46 #define SPRD_COMP_CLK_DATA_TABLE(_struct, _name, _parent, _reg, _table, \ argument
53 #define SPRD_COMP_CLK_DATA(_struct, _name, _parent, _reg, _mshift, \ argument
/openbmc/linux/drivers/regulator/
H A Dmc13xxx.h55 #define MC13xxx_DEFINE(prefix, _name, _node, _reg, _vsel_reg, _voltages, _ops) \ argument
73 #define MC13xxx_FIXED_DEFINE(prefix, _name, _node, _reg, _voltages, _ops) \ argument
88 #define MC13xxx_GPO_DEFINE(prefix, _name, _node, _reg, _voltages, _ops) \ argument
103 #define MC13xxx_DEFINE_SW(_name, _node, _reg, _vsel_reg, _voltages, ops) \ argument
105 #define MC13xxx_DEFINE_REGU(_name, _node, _reg, _vsel_reg, _voltages, ops) \ argument
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt7622.c19 #define GATE_TOP0(_id, _name, _parent, _shift) \ argument
22 #define GATE_TOP1(_id, _name, _parent, _shift) \ argument
25 #define GATE_PERI0(_id, _name, _parent, _shift) \ argument
28 #define GATE_PERI0_AO(_id, _name, _parent, _shift) \ argument
32 #define GATE_PERI1(_id, _name, _parent, _shift) \ argument
H A Dclk-mt8188-vpp0.c32 #define GATE_VPP0_0(_id, _name, _parent, _shift) \ argument
35 #define GATE_VPP0_1(_id, _name, _parent, _shift) \ argument
38 #define GATE_VPP0_2(_id, _name, _parent, _shift) \ argument
H A Dclk-mt8192-mm.c32 #define GATE_MM0(_id, _name, _parent, _shift) \ argument
35 #define GATE_MM1(_id, _name, _parent, _shift) \ argument
38 #define GATE_MM2(_id, _name, _parent, _shift) \ argument
H A Dclk-mt2712-mm.c33 #define GATE_MM0(_id, _name, _parent, _shift) \ argument
36 #define GATE_MM1(_id, _name, _parent, _shift) \ argument
39 #define GATE_MM2(_id, _name, _parent, _shift) \ argument
H A Dclk-mt8195-vpp0.c31 #define GATE_VPP0_0(_id, _name, _parent, _shift) \ argument
34 #define GATE_VPP0_1(_id, _name, _parent, _shift) \ argument
37 #define GATE_VPP0_2(_id, _name, _parent, _shift) \ argument
H A Dclk-mt6765.c488 #define GATE_TOP0(_id, _name, _parent, _shift) \ argument
491 #define GATE_TOP1(_id, _name, _parent, _shift) \ argument
494 #define GATE_TOP2(_id, _name, _parent, _shift) \ argument
546 #define GATE_IFR2(_id, _name, _parent, _shift) \ argument
549 #define GATE_IFR3(_id, _name, _parent, _shift) \ argument
552 #define GATE_IFR4(_id, _name, _parent, _shift) \ argument
555 #define GATE_IFR5(_id, _name, _parent, _shift) \ argument
637 #define GATE_APMIXED(_id, _name, _parent, _shift) \ argument
671 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
695 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
H A Dclk-mt8188-vdec.c32 #define GATE_VDEC0(_id, _name, _parent, _shift) \ argument
35 #define GATE_VDEC1(_id, _name, _parent, _shift) \ argument
38 #define GATE_VDEC2(_id, _name, _parent, _shift) \ argument
H A Dclk-mt8188-wpe.c34 #define GATE_WPE_TOP(_id, _name, _parent, _shift) \ argument
37 #define GATE_WPE_VPP0_0(_id, _name, _parent, _shift) \ argument
40 #define GATE_WPE_VPP0_1(_id, _name, _parent, _shift) \ argument
H A Dclk-mt8192-vdec.c33 #define GATE_VDEC0(_id, _name, _parent, _shift) \ argument
36 #define GATE_VDEC1(_id, _name, _parent, _shift) \ argument
39 #define GATE_VDEC2(_id, _name, _parent, _shift) \ argument
H A Dclk-mt6797.c424 #define GATE_ICG0(_id, _name, _parent, _shift) \ argument
427 #define GATE_ICG1(_id, _name, _parent, _shift) \ argument
430 #define GATE_ICG1_FLAGS(_id, _name, _parent, _shift, _flags) \ argument
434 #define GATE_ICG2(_id, _name, _parent, _shift) \ argument
437 #define GATE_ICG2_FLAGS(_id, _name, _parent, _shift, _flags) \ argument
599 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
619 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
H A Dclk-mt7986-eth.c23 #define GATE_SGMII0(_id, _name, _parent, _shift) \ argument
39 #define GATE_SGMII1(_id, _name, _parent, _shift) \ argument
55 #define GATE_ETH(_id, _name, _parent, _shift) \ argument
H A Dclk-mt7981-eth.c25 #define GATE_SGMII0(_id, _name, _parent, _shift) { \ argument
47 #define GATE_SGMII1(_id, _name, _parent, _shift) { \ argument
69 #define GATE_ETH(_id, _name, _parent, _shift) { \ argument
H A Dclk-mt8195-vdec.c31 #define GATE_VDEC0(_id, _name, _parent, _shift) \ argument
34 #define GATE_VDEC1(_id, _name, _parent, _shift) \ argument
37 #define GATE_VDEC2(_id, _name, _parent, _shift) \ argument
H A Dclk-mt8195-wpe.c31 #define GATE_WPE(_id, _name, _parent, _shift) \ argument
34 #define GATE_WPE_VPP0(_id, _name, _parent, _shift) \ argument
37 #define GATE_WPE_VPP1(_id, _name, _parent, _shift) \ argument
H A Dclk-mt8192-aud.c33 #define GATE_AUD0(_id, _name, _parent, _shift) \ argument
36 #define GATE_AUD1(_id, _name, _parent, _shift) \ argument
39 #define GATE_AUD2(_id, _name, _parent, _shift) \ argument
H A Dclk-mt7986-infracfg.c88 #define GATE_INFRA0(_id, _name, _parent, _shift) \ argument
91 #define GATE_INFRA1(_id, _name, _parent, _shift) \ argument
94 #define GATE_INFRA2(_id, _name, _parent, _shift) \ argument
H A Dclk-mt6779.c867 #define GATE_INFRA0(_id, _name, _parent, _shift) \ argument
870 #define GATE_INFRA1(_id, _name, _parent, _shift) \ argument
873 #define GATE_INFRA2(_id, _name, _parent, _shift) \ argument
876 #define GATE_INFRA3(_id, _name, _parent, _shift) \ argument
1106 #define GATE_APMIXED_FLAGS(_id, _name, _parent, _shift, _flags) \ argument
1110 #define GATE_APMIXED(_id, _name, _parent, _shift) \ argument
1145 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1172 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
H A Dclk-mt7981-infracfg.c101 #define GATE_INFRA0(_id, _name, _parent, _shift) \ argument
108 #define GATE_INFRA1(_id, _name, _parent, _shift) \ argument
115 #define GATE_INFRA2(_id, _name, _parent, _shift) \ argument
/openbmc/linux/drivers/gpu/drm/amd/pm/inc/
H A Damdgpu_pm.h62 #define __AMDGPU_DEVICE_ATTR(_name, _mode, _show, _store, _flags, ...) \ argument
67 #define AMDGPU_DEVICE_ATTR(_name, _mode, _flags, ...) \ argument
72 #define AMDGPU_DEVICE_ATTR_RW(_name, _flags, ...) \ argument
76 #define AMDGPU_DEVICE_ATTR_RO(_name, _flags, ...) \ argument
/openbmc/linux/drivers/pinctrl/mvebu/
H A Dpinctrl-mvebu.h133 #define MPP_FUNC_CTRL(_idl, _idh, _name, _func) \ argument
145 #define MPP_FUNC_GPIO_CTRL(_idl, _idh, _name, _func) \ argument
157 #define _MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \ argument
167 #define MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \ argument
170 #define MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \ argument
174 #define MPP_FUNCTION(_val, _name, _subname) \ argument
/openbmc/linux/drivers/perf/
H A Darm-cmn.c753 #define CMN_EVENT_DTC(_name) \ argument
757 #define CMN_EVENT_HNI(_name, _event) \ argument
759 #define CMN_EVENT_HNP(_name, _event) \ argument
761 #define __CMN_EVENT_XP(_name, _event) \ argument
767 #define CMN_EVENT_MTSX(_name, _event) \ argument
771 #define CMN_EVENT_CXHA(_name, _event) \ argument
773 #define CMN_EVENT_CCRA(_name, _event) \ argument
775 #define CMN_EVENT_CCHA(_name, _event) \ argument
781 #define CMN_EVENT_HNS(_name, _event) \ argument
848 #define _CMN_EVENT_XP(_name, _event) \ argument
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/openbmc/linux/drivers/clk/pistachio/
H A Dclk.h19 #define GATE(_id, _name, _pname, _reg, _shift) \ argument
39 #define MUX(_id, _name, _pnames, _reg, _shift) \ argument
59 #define DIV(_id, _name, _pname, _reg, _width) \ argument
69 #define DIV_F(_id, _name, _pname, _reg, _width, _div_flags) \ argument
86 #define FIXED_FACTOR(_id, _name, _pname, _div) \ argument
119 #define PLL(_id, _name, _pname, _type, _reg, _rates) \ argument
130 #define PLL_FIXED(_id, _name, _pname, _type, _reg) \ argument
/openbmc/linux/drivers/clk/renesas/
H A Drcar-gen4-cpg.h36 #define DEF_GEN4_SDH(_name, _id, _parent, _offset) \ argument
39 #define DEF_GEN4_SD(_name, _id, _parent, _offset) \ argument
42 #define DEF_GEN4_MDSEL(_name, _id, _md, _parent0, _div0, _parent1, _div1) \ argument
47 #define DEF_GEN4_OSC(_name, _id, _parent, _div) \ argument
50 #define DEF_GEN4_Z(_name, _id, _type, _parent, _div, _offset) \ argument

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