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Searched refs:xc (Results 1 – 25 of 429) sorted by relevance

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/openbmc/linux/drivers/dma/
H A Duniphier-xdmac.c227 xc->xd = xd; in uniphier_xdmac_start()
235 spin_lock(&xc->vc.lock); in uniphier_xdmac_chan_irq()
249 xc->xd->cur_node++; in uniphier_xdmac_chan_irq()
250 if (xc->xd->cur_node >= xc->xd->nr_node) { in uniphier_xdmac_chan_irq()
252 uniphier_xdmac_start(xc); in uniphier_xdmac_chan_irq()
254 uniphier_xdmac_chan_start(xc, xc->xd); in uniphier_xdmac_chan_irq()
261 spin_unlock(&xc->vc.lock); in uniphier_xdmac_chan_irq()
415 if (xc->xd) { in uniphier_xdmac_terminate_all()
417 xc->xd = NULL; in uniphier_xdmac_terminate_all()
444 uniphier_xdmac_start(xc); in uniphier_xdmac_issue_pending()
[all …]
/openbmc/linux/arch/powerpc/kvm/
H A Dbook3s_xive.c153 if (xc->mfrr < xc->cppr) { in xive_vm_scan_interrupts()
234 if (prio >= xc->mfrr && xc->mfrr < xc->cppr) { in xive_vm_scan_interrupts()
279 if (xc->cppr != xc->hw_cppr) { in xive_vm_scan_interrupts()
280 xc->hw_cppr = xc->cppr; in xive_vm_scan_interrupts()
301 xc->pending, xc->hw_cppr, xc->cppr); in xive_vm_h_xirr()
310 hirq, xc->hw_cppr, xc->cppr); in xive_vm_h_xirr()
614 xc->hw_cppr = xc->cppr; in xive_vm_h_eoi()
1521 xc->hw_cppr = xc->cppr = cppr; in kvmppc_xive_set_icp()
2915 xc->server_num, xc->vp_id, xc->vp_chip_id, in xive_debug_show()
2916 xc->cppr, xc->hw_cppr, in xive_debug_show()
[all …]
H A Dbook3s_xive_native.c82 if (!xc) in kvmppc_xive_native_cleanup_vcpu()
116 kfree(xc); in kvmppc_xive_native_cleanup_vcpu()
148 xc = kzalloc(sizeof(*xc), GFP_KERNEL); in kvmppc_xive_native_connect_vcpu()
149 if (!xc) { in kvmppc_xive_native_connect_vcpu()
155 xc->xive = xive; in kvmppc_xive_native_connect_vcpu()
163 rc = xive_native_get_vp_info(xc->vp_id, &xc->vp_cam, &xc->vp_chip_id); in kvmppc_xive_native_connect_vcpu()
819 if (!xc) in kvmppc_xive_reset()
897 if (!xc) in kvmppc_xive_native_vcpu_eq_sync()
1145 if (!xc) in kvmppc_xive_native_get_vp()
1226 if (!xc) in xive_native_debug_show()
[all …]
/openbmc/linux/arch/powerpc/sysdev/xive/
H A Dcommon.c206 xc->cppr = prio; in xive_scan_interrupts()
275 if (xc) { in xmon_xive_do_dump()
276 xmon_printf("pp=%02x CPPR=%02x ", xc->pending_prio, xc->cppr); in xmon_xive_do_dump()
1082 if (!xc) in xive_ipi_eoi()
1236 xc->hw_ipi, xive_ipi_irq, xc->ipi_data.trig_mmio); in xive_setup_cpu_ipi()
1495 if (!xc) { in xive_prepare_cpu()
1498 if (!xc) in xive_prepare_cpu()
1613 xc->cppr = 0; in xive_smp_disable_cpu()
1643 xc->cppr = 0; in xive_teardown_cpu()
1734 if (xc) { in xive_debug_show_ipi()
[all …]
H A Dxive-internal.h45 int (*setup_queue)(unsigned int cpu, struct xive_cpu *xc, u8 prio);
46 void (*cleanup_queue)(unsigned int cpu, struct xive_cpu *xc, u8 prio);
47 void (*prepare_cpu)(unsigned int cpu, struct xive_cpu *xc);
48 void (*setup_cpu)(unsigned int cpu, struct xive_cpu *xc);
49 void (*teardown_cpu)(unsigned int cpu, struct xive_cpu *xc);
53 void (*update_pending)(struct xive_cpu *xc);
57 int (*get_ipi)(unsigned int cpu, struct xive_cpu *xc);
58 void (*put_ipi)(unsigned int cpu, struct xive_cpu *xc);
H A Dnative.c218 struct xive_q *q = &xc->queue[prio]; in xive_native_setup_queue()
231 struct xive_q *q = &xc->queue[prio]; in xive_native_cleanup_queue()
267 irq = opal_xive_allocate_irq(xc->chip_id); in xive_native_get_ipi()
276 xc->hw_ipi = irq; in xive_native_get_ipi()
316 if (xc->hw_ipi == XIVE_BAD_IRQ) in xive_native_put_ipi()
319 rc = opal_xive_free_irq(xc->hw_ipi); in xive_native_put_ipi()
324 xc->hw_ipi = XIVE_BAD_IRQ; in xive_native_put_ipi()
365 xc->pending_prio |= 1 << cppr; in xive_native_update_pending()
371 if (cppr >= xc->cppr) in xive_native_update_pending()
376 xc->cppr = cppr; in xive_native_update_pending()
[all …]
H A Dspapr.c533 struct xive_q *q = &xc->queue[prio]; in xive_spapr_setup_queue()
547 struct xive_q *q = &xc->queue[prio]; in xive_spapr_cleanup_queue()
580 xc->hw_ipi = irq; in xive_spapr_get_ipi()
586 if (xc->hw_ipi == XIVE_BAD_IRQ) in xive_spapr_put_ipi()
589 xive_irq_bitmap_free(xc->hw_ipi); in xive_spapr_put_ipi()
590 xc->hw_ipi = XIVE_BAD_IRQ; in xive_spapr_put_ipi()
603 static void xive_spapr_update_pending(struct xive_cpu *xc) in xive_spapr_update_pending() argument
631 xc->pending_prio |= 1 << cppr; in xive_spapr_update_pending()
637 if (cppr >= xc->cppr) in xive_spapr_update_pending()
639 smp_processor_id(), cppr, xc->cppr); in xive_spapr_update_pending()
[all …]
/openbmc/qemu/include/hw/xen/
H A Dxen_backend_ops.h57 int (*unbind)(xenevtchn_handle *xc, evtchn_port_t port);
58 int (*close)(struct xenevtchn_handle *xc);
59 int (*get_fd)(struct xenevtchn_handle *xc);
62 int (*pending)(struct xenevtchn_handle *xc);
91 return xen_evtchn_ops->unbind(xc, port); in qemu_xen_evtchn_unbind()
99 return xen_evtchn_ops->close(xc); in qemu_xen_evtchn_close()
102 static inline int qemu_xen_evtchn_fd(xenevtchn_handle *xc) in qemu_xen_evtchn_fd() argument
107 return xen_evtchn_ops->get_fd(xc); in qemu_xen_evtchn_fd()
116 return xen_evtchn_ops->notify(xc, port); in qemu_xen_evtchn_notify()
125 return xen_evtchn_ops->unmask(xc, port); in qemu_xen_evtchn_unmask()
[all …]
/openbmc/qemu/scripts/
H A Dxen-detect.c71 xc_interface *xc = NULL; in main() local
79 xc = xc_interface_open(0, 0, 0); in main()
82 xc_hvm_inject_msi(xc, 0, 0xf0000000, 0x00000000); in main()
83 xc_hvm_create_ioreq_server(xc, 0, HVM_IOREQSRV_BUFIOREQ_ATOMIC, NULL); in main()
116 xc_interface *xc = NULL; in main() local
123 xc = xc_interface_open(0, 0, 0); in main()
126 xc_hvm_inject_msi(xc, 0, 0xf0000000, 0x00000000); in main()
127 xc_hvm_create_ioreq_server(xc, 0, HVM_IOREQSRV_BUFIOREQ_ATOMIC, NULL); in main()
/openbmc/qemu/hw/i386/kvm/
H A Dxen_evtchn.h42 int xen_be_evtchn_bind_interdomain(struct xenevtchn_handle *xc, uint32_t domid,
44 int xen_be_evtchn_unbind(struct xenevtchn_handle *xc, evtchn_port_t port);
45 int xen_be_evtchn_close(struct xenevtchn_handle *xc);
46 int xen_be_evtchn_fd(struct xenevtchn_handle *xc);
47 int xen_be_evtchn_notify(struct xenevtchn_handle *xc, evtchn_port_t port);
48 int xen_be_evtchn_unmask(struct xenevtchn_handle *xc, evtchn_port_t port);
49 int xen_be_evtchn_pending(struct xenevtchn_handle *xc);
51 int xen_be_evtchn_get_guest_port(struct xenevtchn_handle *xc);
H A Dxen_evtchn.c1383 if (!xc) { in xen_evtchn_bind_interdomain_op()
2002 free(xc); in xen_be_evtchn_open()
2006 return xc; in xen_be_evtchn_open()
2035 if (!xc) { in xen_be_evtchn_bind_interdomain()
2105 if (!xc) { in xen_be_evtchn_unbind()
2141 if (!xc) { in xen_be_evtchn_close()
2148 free(xc); in xen_be_evtchn_close()
2154 if (!xc) { in xen_be_evtchn_fd()
2169 if (!xc) { in xen_be_evtchn_notify()
2191 if (!xc) { in xen_be_evtchn_pending()
[all …]
/openbmc/qemu/target/i386/
H A Dcpu-sysemu.c157 X86CPU *xc = NULL; in x86_cpu_from_model() local
167 xc = X86_CPU(object_new_with_class(OBJECT_CLASS(xcc))); in x86_cpu_from_model()
175 x86_cpu_expand_features(xc, &err); in x86_cpu_from_model()
183 object_unref(OBJECT(xc)); in x86_cpu_from_model()
184 xc = NULL; in x86_cpu_from_model()
186 return xc; in x86_cpu_from_model()
194 X86CPU *xc = NULL; in qmp_query_cpu_model_expansion() local
213 x86_cpu_to_dict(xc, props); in qmp_query_cpu_model_expansion()
221 x86_cpu_to_dict_full(xc, props); in qmp_query_cpu_model_expansion()
228 x86_cpu_to_dict(xc, props); in qmp_query_cpu_model_expansion()
[all …]
/openbmc/linux/arch/mips/math-emu/
H A Dieee754int.h40 static inline int ieee754_class_nan(int xc) in ieee754_class_nan() argument
42 return xc >= IEEE754_CLASS_SNAN; in ieee754_class_nan()
46 unsigned int xm; int xe; int xs __maybe_unused; int xc
78 #define EXPLODEXSP EXPLODESP(x, xc, xs, xe, xm)
84 u64 xm; int xe; int xs __maybe_unused; int xc
116 #define EXPLODEXDP EXPLODEDP(x, xc, xs, xe, xm)
142 #define FLUSHXDP FLUSHDP(x, xc, xs, xe, xm)
145 #define FLUSHXSP FLUSHSP(x, xc, xs, xe, xm)
H A Dsp_rint.c29 if (xc == IEEE754_CLASS_SNAN) in ieee754sp_rint()
32 if ((xc == IEEE754_CLASS_QNAN) || in ieee754sp_rint()
33 (xc == IEEE754_CLASS_INF) || in ieee754sp_rint()
34 (xc == IEEE754_CLASS_ZERO)) in ieee754sp_rint()
H A Ddp_rint.c29 if (xc == IEEE754_CLASS_SNAN) in ieee754dp_rint()
32 if ((xc == IEEE754_CLASS_QNAN) || in ieee754dp_rint()
33 (xc == IEEE754_CLASS_INF) || in ieee754dp_rint()
34 (xc == IEEE754_CLASS_ZERO)) in ieee754dp_rint()
H A Ddp_2008class.c35 switch(xc) { in ieee754dp_2008class()
49 pr_err("Unknown class: %d\n", xc); in ieee754dp_2008class()
H A Dsp_2008class.c35 switch(xc) { in ieee754sp_2008class()
49 pr_err("Unknown class: %d\n", xc); in ieee754sp_2008class()
H A Dsp_cmp.c26 if (ieee754_class_nan(xc) || ieee754_class_nan(yc)) { in ieee754sp_cmp()
28 xc == IEEE754_CLASS_SNAN || yc == IEEE754_CLASS_SNAN) in ieee754sp_cmp()
H A Ddp_cmp.c26 if (ieee754_class_nan(xc) || ieee754_class_nan(yc)) { in ieee754dp_cmp()
28 xc == IEEE754_CLASS_SNAN || yc == IEEE754_CLASS_SNAN) in ieee754dp_cmp()
/openbmc/u-boot/scripts/
H A Dgcc-version.sh25 MAJOR=$(echo __GNUC__ | $compiler -E -xc - | tail -n 1)
26 MINOR=$(echo __GNUC_MINOR__ | $compiler -E -xc - | tail -n 1)
28 PATCHLEVEL=$(echo __GNUC_PATCHLEVEL__ | $compiler -E -xc - | tail -n 1)
/openbmc/linux/arch/powerpc/boot/dts/fsl/
H A Dcyrus_p5020.dts76 ranges = <0 0 0xc 0x20000000 0 0x10000000>;
79 ranges = <0 0 0xc 0x30000000 0 0x10000000>;
92 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
107 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
122 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
137 ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000
H A Dmpc8536ds_36b.dts45 ranges = <0x02000000 0 0xf0000000 0xc 0x00000000 0 0x10000000
60 ranges = <0x02000000 0 0xf8000000 0xc 0x18000000 0 0x08000000
75 ranges = <0x02000000 0 0xf8000000 0xc 0x10000000 0 0x08000000
90 ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x20000000
/openbmc/linux/arch/x86/kernel/
H A Dtopology.c43 struct x86_cpu *xc = per_cpu_ptr(&cpu_devices, cpu); in arch_register_cpu() local
45 xc->cpu.hotpluggable = cpu > 0; in arch_register_cpu()
46 return register_cpu(&xc->cpu, cpu); in arch_register_cpu()
/openbmc/linux/Documentation/devicetree/bindings/thermal/
H A Dti_soc_thermal.txt70 reg = <0x4a0021e0 0xc
71 0x4a00232c 0xc
80 reg = <0x4a0021e0 0xc
81 0x4a00232c 0xc
/openbmc/qemu/target/ppc/
H A Dinsn64.decode56 &8RR_XX4 xt xa xb xc
59 &8RR_XX4 xt=%8rr_xx_xt xa=%8rr_xx_xa xb=%8rr_xx_xb xc=%8rr_xx_xc
61 &8RR_XX4_imm xt xa xb xc imm
64 &8RR_XX4_imm xt=%8rr_xx_xt xa=%8rr_xx_xa xb=%8rr_xx_xb xc=%8rr_xx_xc
66 &8RR_XX4_uim3 xt xa xb xc uim3
69 &8RR_XX4_uim3 xt=%8rr_xx_xt xa=%8rr_xx_xa xb=%8rr_xx_xb xc=%8rr_xx_xc

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