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Searched refs:writel_be (Results 1 – 8 of 8) sorted by relevance

/openbmc/u-boot/drivers/net/
H A Dbcm6348-eth.c138 writel_be(ETH_CTL_RESET_MASK, priv->base + ETH_CTL_REG); in bcm6348_eth_mac_reset()
225 writel_be(0, MIB_REG(i)); in bcm6348_eth_start()
231 writel_be((ETH_MAX_MTU_SIZE << ETH_RXMAXLEN_SHIFT) & in bcm6348_eth_start()
233 writel_be((ETH_MAX_MTU_SIZE << ETH_TXMAXLEN_SHIFT) & in bcm6348_eth_start()
237 writel_be((ETH_TX_WATERMARK << ETH_TXWMARK_WM_SHIFT) & in bcm6348_eth_start()
244 writel_be(0, priv->base + ETH_IRMASK_REG); in bcm6348_eth_start()
278 writel_be((pdata->enetaddr[2] << 24) | (pdata->enetaddr[3]) << 16 | in bcm6348_eth_write_hwaddr()
281 writel_be((pdata->enetaddr[1]) | (pdata->enetaddr[0] << 8) | in bcm6348_eth_write_hwaddr()
308 writel_be(ETH_IR_MII_MASK, base + ETH_IR_REG); in bcm6348_mdio_op()
311 writel_be(data, base + MII_DAT_REG); in bcm6348_mdio_op()
[all …]
H A Dbcm6368-eth.c150 writel_be(0, priv->base + MII_SC_REG); in bcm6368_mdio_read()
159 writel_be(val, priv->base + MII_SC_REG); in bcm6368_mdio_read()
170 writel_be(0, priv->base + MII_SC_REG); in bcm6368_mdio_write()
181 writel_be(val, priv->base + MII_SC_REG); in bcm6368_mdio_write()
626 writel_be(0x1ff, priv->base + ETH_JMBCTL_PORT_REG); in bcm6368_eth_probe()
/openbmc/u-boot/drivers/dma/
H A Dbcm6348-iudma.c163 writel_be(halt, priv->chan + DMAC_CFG_REG(ch)); in bcm6348_iudma_chan_stop()
193 writel_be(DMA_FLOWC_ALLOC_FORCE_MASK, in bcm6348_iudma_disable()
239 writel_be(0, priv->sram + DMAS_STATE_DATA_REG(dma->id)); in bcm6348_iudma_enable()
240 writel_be(0, priv->sram + DMAS_DESC_LEN_STATUS_REG(dma->id)); in bcm6348_iudma_enable()
241 writel_be(0, priv->sram + DMAS_DESC_BASE_BUFPTR_REG(dma->id)); in bcm6348_iudma_enable()
244 writel_be(virt_to_phys(ch_priv->dma_ring), in bcm6348_iudma_enable()
255 writel_be(val, priv->base + DMA_FLOWC_THR_LO_REG(dma->id)); in bcm6348_iudma_enable()
258 writel_be(val, priv->base + DMA_FLOWC_THR_HI_REG(dma->id)); in bcm6348_iudma_enable()
260 writel_be(0, priv->base + DMA_FLOWC_ALLOC_REG(dma->id)); in bcm6348_iudma_enable()
264 writel_be(ch_priv->desc_cnt, in bcm6348_iudma_enable()
[all …]
/openbmc/u-boot/drivers/spi/
H A Dbcm63xx_hsspi.c149 writel_be(set, priv->regs + SPI_PFL_CLK_REG(plat->cs)); in bcm63xx_hsspi_activate_cs()
250 writel_be(val, priv->regs + SPI_PFL_MODE_REG(plat->cs)); in bcm63xx_hsspi_xfer()
274 writel_be(val, priv->regs + SPI_CMD_REG); in bcm63xx_hsspi_xfer()
384 writel_be(0, priv->regs + SPI_IR_MASK_REG); in bcm63xx_hsspi_probe()
387 writel_be(SPI_IR_CLEAR_ALL, priv->regs + SPI_IR_STAT_REG); in bcm63xx_hsspi_probe()
/openbmc/u-boot/drivers/phy/
H A Dbcm6358-usbh-phy.c42 writel_be(USBH_TEST_PORT_CTL, priv->regs + USBH_TEST_REG); in bcm6358_usbh_init()
H A Dbcm6348-usbh-phy.c28 writel_be(USBH_SETUP_PORT1_EN, priv->regs); in bcm6348_usbh_init()
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dio.h298 #define writel_be(val, addr) \ macro
/openbmc/u-boot/arch/mips/include/asm/
H A Dio.h383 #define writel_be(val, addr) \ in BUILDIO_MEM() macro