1*55e55fe4SÁlvaro Fernández Rojas // SPDX-License-Identifier: GPL-2.0+
2*55e55fe4SÁlvaro Fernández Rojas /*
3*55e55fe4SÁlvaro Fernández Rojas * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
4*55e55fe4SÁlvaro Fernández Rojas *
5*55e55fe4SÁlvaro Fernández Rojas * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c:
6*55e55fe4SÁlvaro Fernández Rojas * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
7*55e55fe4SÁlvaro Fernández Rojas */
8*55e55fe4SÁlvaro Fernández Rojas
9*55e55fe4SÁlvaro Fernández Rojas #include <common.h>
10*55e55fe4SÁlvaro Fernández Rojas #include <clk.h>
11*55e55fe4SÁlvaro Fernández Rojas #include <dm.h>
12*55e55fe4SÁlvaro Fernández Rojas #include <dma.h>
13*55e55fe4SÁlvaro Fernández Rojas #include <miiphy.h>
14*55e55fe4SÁlvaro Fernández Rojas #include <net.h>
15*55e55fe4SÁlvaro Fernández Rojas #include <phy.h>
16*55e55fe4SÁlvaro Fernández Rojas #include <reset.h>
17*55e55fe4SÁlvaro Fernández Rojas #include <wait_bit.h>
18*55e55fe4SÁlvaro Fernández Rojas #include <asm/io.h>
19*55e55fe4SÁlvaro Fernández Rojas
20*55e55fe4SÁlvaro Fernández Rojas #define ETH_RX_DESC PKTBUFSRX
21*55e55fe4SÁlvaro Fernández Rojas #define ETH_MAX_MTU_SIZE 1518
22*55e55fe4SÁlvaro Fernández Rojas #define ETH_TIMEOUT 100
23*55e55fe4SÁlvaro Fernández Rojas #define ETH_TX_WATERMARK 32
24*55e55fe4SÁlvaro Fernández Rojas
25*55e55fe4SÁlvaro Fernández Rojas /* ETH Receiver Configuration register */
26*55e55fe4SÁlvaro Fernández Rojas #define ETH_RXCFG_REG 0x00
27*55e55fe4SÁlvaro Fernández Rojas #define ETH_RXCFG_ENFLOW_SHIFT 5
28*55e55fe4SÁlvaro Fernández Rojas #define ETH_RXCFG_ENFLOW_MASK (1 << ETH_RXCFG_ENFLOW_SHIFT)
29*55e55fe4SÁlvaro Fernández Rojas
30*55e55fe4SÁlvaro Fernández Rojas /* ETH Receive Maximum Length register */
31*55e55fe4SÁlvaro Fernández Rojas #define ETH_RXMAXLEN_REG 0x04
32*55e55fe4SÁlvaro Fernández Rojas #define ETH_RXMAXLEN_SHIFT 0
33*55e55fe4SÁlvaro Fernández Rojas #define ETH_RXMAXLEN_MASK (0x7ff << ETH_RXMAXLEN_SHIFT)
34*55e55fe4SÁlvaro Fernández Rojas
35*55e55fe4SÁlvaro Fernández Rojas /* ETH Transmit Maximum Length register */
36*55e55fe4SÁlvaro Fernández Rojas #define ETH_TXMAXLEN_REG 0x08
37*55e55fe4SÁlvaro Fernández Rojas #define ETH_TXMAXLEN_SHIFT 0
38*55e55fe4SÁlvaro Fernández Rojas #define ETH_TXMAXLEN_MASK (0x7ff << ETH_TXMAXLEN_SHIFT)
39*55e55fe4SÁlvaro Fernández Rojas
40*55e55fe4SÁlvaro Fernández Rojas /* MII Status/Control register */
41*55e55fe4SÁlvaro Fernández Rojas #define MII_SC_REG 0x10
42*55e55fe4SÁlvaro Fernández Rojas #define MII_SC_MDCFREQDIV_SHIFT 0
43*55e55fe4SÁlvaro Fernández Rojas #define MII_SC_MDCFREQDIV_MASK (0x7f << MII_SC_MDCFREQDIV_SHIFT)
44*55e55fe4SÁlvaro Fernández Rojas #define MII_SC_PREAMBLE_EN_SHIFT 7
45*55e55fe4SÁlvaro Fernández Rojas #define MII_SC_PREAMBLE_EN_MASK (1 << MII_SC_PREAMBLE_EN_SHIFT)
46*55e55fe4SÁlvaro Fernández Rojas
47*55e55fe4SÁlvaro Fernández Rojas /* MII Data register */
48*55e55fe4SÁlvaro Fernández Rojas #define MII_DAT_REG 0x14
49*55e55fe4SÁlvaro Fernández Rojas #define MII_DAT_DATA_SHIFT 0
50*55e55fe4SÁlvaro Fernández Rojas #define MII_DAT_DATA_MASK (0xffff << MII_DAT_DATA_SHIFT)
51*55e55fe4SÁlvaro Fernández Rojas #define MII_DAT_TA_SHIFT 16
52*55e55fe4SÁlvaro Fernández Rojas #define MII_DAT_TA_MASK (0x3 << MII_DAT_TA_SHIFT)
53*55e55fe4SÁlvaro Fernández Rojas #define MII_DAT_REG_SHIFT 18
54*55e55fe4SÁlvaro Fernández Rojas #define MII_DAT_REG_MASK (0x1f << MII_DAT_REG_SHIFT)
55*55e55fe4SÁlvaro Fernández Rojas #define MII_DAT_PHY_SHIFT 23
56*55e55fe4SÁlvaro Fernández Rojas #define MII_DAT_PHY_MASK (0x1f << MII_DAT_PHY_SHIFT)
57*55e55fe4SÁlvaro Fernández Rojas #define MII_DAT_OP_SHIFT 28
58*55e55fe4SÁlvaro Fernández Rojas #define MII_DAT_OP_WRITE (0x5 << MII_DAT_OP_SHIFT)
59*55e55fe4SÁlvaro Fernández Rojas #define MII_DAT_OP_READ (0x6 << MII_DAT_OP_SHIFT)
60*55e55fe4SÁlvaro Fernández Rojas
61*55e55fe4SÁlvaro Fernández Rojas /* ETH Interrupts Mask register */
62*55e55fe4SÁlvaro Fernández Rojas #define ETH_IRMASK_REG 0x18
63*55e55fe4SÁlvaro Fernández Rojas
64*55e55fe4SÁlvaro Fernández Rojas /* ETH Interrupts register */
65*55e55fe4SÁlvaro Fernández Rojas #define ETH_IR_REG 0x1c
66*55e55fe4SÁlvaro Fernández Rojas #define ETH_IR_MII_SHIFT 0
67*55e55fe4SÁlvaro Fernández Rojas #define ETH_IR_MII_MASK (1 << ETH_IR_MII_SHIFT)
68*55e55fe4SÁlvaro Fernández Rojas
69*55e55fe4SÁlvaro Fernández Rojas /* ETH Control register */
70*55e55fe4SÁlvaro Fernández Rojas #define ETH_CTL_REG 0x2c
71*55e55fe4SÁlvaro Fernández Rojas #define ETH_CTL_ENABLE_SHIFT 0
72*55e55fe4SÁlvaro Fernández Rojas #define ETH_CTL_ENABLE_MASK (1 << ETH_CTL_ENABLE_SHIFT)
73*55e55fe4SÁlvaro Fernández Rojas #define ETH_CTL_DISABLE_SHIFT 1
74*55e55fe4SÁlvaro Fernández Rojas #define ETH_CTL_DISABLE_MASK (1 << ETH_CTL_DISABLE_SHIFT)
75*55e55fe4SÁlvaro Fernández Rojas #define ETH_CTL_RESET_SHIFT 2
76*55e55fe4SÁlvaro Fernández Rojas #define ETH_CTL_RESET_MASK (1 << ETH_CTL_RESET_SHIFT)
77*55e55fe4SÁlvaro Fernández Rojas #define ETH_CTL_EPHY_SHIFT 3
78*55e55fe4SÁlvaro Fernández Rojas #define ETH_CTL_EPHY_MASK (1 << ETH_CTL_EPHY_SHIFT)
79*55e55fe4SÁlvaro Fernández Rojas
80*55e55fe4SÁlvaro Fernández Rojas /* ETH Transmit Control register */
81*55e55fe4SÁlvaro Fernández Rojas #define ETH_TXCTL_REG 0x30
82*55e55fe4SÁlvaro Fernández Rojas #define ETH_TXCTL_FD_SHIFT 0
83*55e55fe4SÁlvaro Fernández Rojas #define ETH_TXCTL_FD_MASK (1 << ETH_TXCTL_FD_SHIFT)
84*55e55fe4SÁlvaro Fernández Rojas
85*55e55fe4SÁlvaro Fernández Rojas /* ETH Transmit Watermask register */
86*55e55fe4SÁlvaro Fernández Rojas #define ETH_TXWMARK_REG 0x34
87*55e55fe4SÁlvaro Fernández Rojas #define ETH_TXWMARK_WM_SHIFT 0
88*55e55fe4SÁlvaro Fernández Rojas #define ETH_TXWMARK_WM_MASK (0x3f << ETH_TXWMARK_WM_SHIFT)
89*55e55fe4SÁlvaro Fernández Rojas
90*55e55fe4SÁlvaro Fernández Rojas /* MIB Control register */
91*55e55fe4SÁlvaro Fernández Rojas #define MIB_CTL_REG 0x38
92*55e55fe4SÁlvaro Fernández Rojas #define MIB_CTL_RDCLEAR_SHIFT 0
93*55e55fe4SÁlvaro Fernández Rojas #define MIB_CTL_RDCLEAR_MASK (1 << MIB_CTL_RDCLEAR_SHIFT)
94*55e55fe4SÁlvaro Fernández Rojas
95*55e55fe4SÁlvaro Fernández Rojas /* ETH Perfect Match registers */
96*55e55fe4SÁlvaro Fernández Rojas #define ETH_PM_CNT 4
97*55e55fe4SÁlvaro Fernández Rojas #define ETH_PML_REG(x) (0x58 + (x) * 0x8)
98*55e55fe4SÁlvaro Fernández Rojas #define ETH_PMH_REG(x) (0x5c + (x) * 0x8)
99*55e55fe4SÁlvaro Fernández Rojas #define ETH_PMH_VALID_SHIFT 16
100*55e55fe4SÁlvaro Fernández Rojas #define ETH_PMH_VALID_MASK (1 << ETH_PMH_VALID_SHIFT)
101*55e55fe4SÁlvaro Fernández Rojas
102*55e55fe4SÁlvaro Fernández Rojas /* MIB Counters registers */
103*55e55fe4SÁlvaro Fernández Rojas #define MIB_REG_CNT 55
104*55e55fe4SÁlvaro Fernández Rojas #define MIB_REG(x) (0x200 + (x) * 4)
105*55e55fe4SÁlvaro Fernández Rojas
106*55e55fe4SÁlvaro Fernández Rojas /* ETH data */
107*55e55fe4SÁlvaro Fernández Rojas struct bcm6348_eth_priv {
108*55e55fe4SÁlvaro Fernández Rojas void __iomem *base;
109*55e55fe4SÁlvaro Fernández Rojas /* DMA */
110*55e55fe4SÁlvaro Fernández Rojas struct dma rx_dma;
111*55e55fe4SÁlvaro Fernández Rojas struct dma tx_dma;
112*55e55fe4SÁlvaro Fernández Rojas /* PHY */
113*55e55fe4SÁlvaro Fernández Rojas int phy_id;
114*55e55fe4SÁlvaro Fernández Rojas struct phy_device *phy_dev;
115*55e55fe4SÁlvaro Fernández Rojas };
116*55e55fe4SÁlvaro Fernández Rojas
bcm6348_eth_mac_disable(struct bcm6348_eth_priv * priv)117*55e55fe4SÁlvaro Fernández Rojas static void bcm6348_eth_mac_disable(struct bcm6348_eth_priv *priv)
118*55e55fe4SÁlvaro Fernández Rojas {
119*55e55fe4SÁlvaro Fernández Rojas /* disable emac */
120*55e55fe4SÁlvaro Fernández Rojas clrsetbits_be32(priv->base + ETH_CTL_REG, ETH_CTL_ENABLE_MASK,
121*55e55fe4SÁlvaro Fernández Rojas ETH_CTL_DISABLE_MASK);
122*55e55fe4SÁlvaro Fernández Rojas
123*55e55fe4SÁlvaro Fernández Rojas /* wait until emac is disabled */
124*55e55fe4SÁlvaro Fernández Rojas if (wait_for_bit_be32(priv->base + ETH_CTL_REG,
125*55e55fe4SÁlvaro Fernández Rojas ETH_CTL_DISABLE_MASK, false,
126*55e55fe4SÁlvaro Fernández Rojas ETH_TIMEOUT, false))
127*55e55fe4SÁlvaro Fernández Rojas pr_err("%s: error disabling emac\n", __func__);
128*55e55fe4SÁlvaro Fernández Rojas }
129*55e55fe4SÁlvaro Fernández Rojas
bcm6348_eth_mac_enable(struct bcm6348_eth_priv * priv)130*55e55fe4SÁlvaro Fernández Rojas static void bcm6348_eth_mac_enable(struct bcm6348_eth_priv *priv)
131*55e55fe4SÁlvaro Fernández Rojas {
132*55e55fe4SÁlvaro Fernández Rojas setbits_be32(priv->base + ETH_CTL_REG, ETH_CTL_ENABLE_MASK);
133*55e55fe4SÁlvaro Fernández Rojas }
134*55e55fe4SÁlvaro Fernández Rojas
bcm6348_eth_mac_reset(struct bcm6348_eth_priv * priv)135*55e55fe4SÁlvaro Fernández Rojas static void bcm6348_eth_mac_reset(struct bcm6348_eth_priv *priv)
136*55e55fe4SÁlvaro Fernández Rojas {
137*55e55fe4SÁlvaro Fernández Rojas /* reset emac */
138*55e55fe4SÁlvaro Fernández Rojas writel_be(ETH_CTL_RESET_MASK, priv->base + ETH_CTL_REG);
139*55e55fe4SÁlvaro Fernández Rojas wmb();
140*55e55fe4SÁlvaro Fernández Rojas
141*55e55fe4SÁlvaro Fernández Rojas /* wait until emac is reset */
142*55e55fe4SÁlvaro Fernández Rojas if (wait_for_bit_be32(priv->base + ETH_CTL_REG,
143*55e55fe4SÁlvaro Fernández Rojas ETH_CTL_RESET_MASK, false,
144*55e55fe4SÁlvaro Fernández Rojas ETH_TIMEOUT, false))
145*55e55fe4SÁlvaro Fernández Rojas pr_err("%s: error resetting emac\n", __func__);
146*55e55fe4SÁlvaro Fernández Rojas }
147*55e55fe4SÁlvaro Fernández Rojas
bcm6348_eth_free_pkt(struct udevice * dev,uchar * packet,int len)148*55e55fe4SÁlvaro Fernández Rojas static int bcm6348_eth_free_pkt(struct udevice *dev, uchar *packet, int len)
149*55e55fe4SÁlvaro Fernández Rojas {
150*55e55fe4SÁlvaro Fernández Rojas struct bcm6348_eth_priv *priv = dev_get_priv(dev);
151*55e55fe4SÁlvaro Fernández Rojas
152*55e55fe4SÁlvaro Fernández Rojas return dma_prepare_rcv_buf(&priv->rx_dma, packet, len);
153*55e55fe4SÁlvaro Fernández Rojas }
154*55e55fe4SÁlvaro Fernández Rojas
bcm6348_eth_recv(struct udevice * dev,int flags,uchar ** packetp)155*55e55fe4SÁlvaro Fernández Rojas static int bcm6348_eth_recv(struct udevice *dev, int flags, uchar **packetp)
156*55e55fe4SÁlvaro Fernández Rojas {
157*55e55fe4SÁlvaro Fernández Rojas struct bcm6348_eth_priv *priv = dev_get_priv(dev);
158*55e55fe4SÁlvaro Fernández Rojas
159*55e55fe4SÁlvaro Fernández Rojas return dma_receive(&priv->rx_dma, (void**)packetp, NULL);
160*55e55fe4SÁlvaro Fernández Rojas }
161*55e55fe4SÁlvaro Fernández Rojas
bcm6348_eth_send(struct udevice * dev,void * packet,int length)162*55e55fe4SÁlvaro Fernández Rojas static int bcm6348_eth_send(struct udevice *dev, void *packet, int length)
163*55e55fe4SÁlvaro Fernández Rojas {
164*55e55fe4SÁlvaro Fernández Rojas struct bcm6348_eth_priv *priv = dev_get_priv(dev);
165*55e55fe4SÁlvaro Fernández Rojas
166*55e55fe4SÁlvaro Fernández Rojas return dma_send(&priv->tx_dma, packet, length, NULL);
167*55e55fe4SÁlvaro Fernández Rojas }
168*55e55fe4SÁlvaro Fernández Rojas
bcm6348_eth_adjust_link(struct udevice * dev,struct phy_device * phydev)169*55e55fe4SÁlvaro Fernández Rojas static int bcm6348_eth_adjust_link(struct udevice *dev,
170*55e55fe4SÁlvaro Fernández Rojas struct phy_device *phydev)
171*55e55fe4SÁlvaro Fernández Rojas {
172*55e55fe4SÁlvaro Fernández Rojas struct bcm6348_eth_priv *priv = dev_get_priv(dev);
173*55e55fe4SÁlvaro Fernández Rojas
174*55e55fe4SÁlvaro Fernández Rojas /* mac duplex parameters */
175*55e55fe4SÁlvaro Fernández Rojas if (phydev->duplex)
176*55e55fe4SÁlvaro Fernández Rojas setbits_be32(priv->base + ETH_TXCTL_REG, ETH_TXCTL_FD_MASK);
177*55e55fe4SÁlvaro Fernández Rojas else
178*55e55fe4SÁlvaro Fernández Rojas clrbits_be32(priv->base + ETH_TXCTL_REG, ETH_TXCTL_FD_MASK);
179*55e55fe4SÁlvaro Fernández Rojas
180*55e55fe4SÁlvaro Fernández Rojas /* rx flow control (pause frame handling) */
181*55e55fe4SÁlvaro Fernández Rojas if (phydev->pause)
182*55e55fe4SÁlvaro Fernández Rojas setbits_be32(priv->base + ETH_RXCFG_REG,
183*55e55fe4SÁlvaro Fernández Rojas ETH_RXCFG_ENFLOW_MASK);
184*55e55fe4SÁlvaro Fernández Rojas else
185*55e55fe4SÁlvaro Fernández Rojas clrbits_be32(priv->base + ETH_RXCFG_REG,
186*55e55fe4SÁlvaro Fernández Rojas ETH_RXCFG_ENFLOW_MASK);
187*55e55fe4SÁlvaro Fernández Rojas
188*55e55fe4SÁlvaro Fernández Rojas return 0;
189*55e55fe4SÁlvaro Fernández Rojas }
190*55e55fe4SÁlvaro Fernández Rojas
bcm6348_eth_start(struct udevice * dev)191*55e55fe4SÁlvaro Fernández Rojas static int bcm6348_eth_start(struct udevice *dev)
192*55e55fe4SÁlvaro Fernández Rojas {
193*55e55fe4SÁlvaro Fernández Rojas struct bcm6348_eth_priv *priv = dev_get_priv(dev);
194*55e55fe4SÁlvaro Fernández Rojas int ret, i;
195*55e55fe4SÁlvaro Fernández Rojas
196*55e55fe4SÁlvaro Fernández Rojas /* prepare rx dma buffers */
197*55e55fe4SÁlvaro Fernández Rojas for (i = 0; i < ETH_RX_DESC; i++) {
198*55e55fe4SÁlvaro Fernández Rojas ret = dma_prepare_rcv_buf(&priv->rx_dma, net_rx_packets[i],
199*55e55fe4SÁlvaro Fernández Rojas PKTSIZE_ALIGN);
200*55e55fe4SÁlvaro Fernández Rojas if (ret < 0)
201*55e55fe4SÁlvaro Fernández Rojas break;
202*55e55fe4SÁlvaro Fernández Rojas }
203*55e55fe4SÁlvaro Fernández Rojas
204*55e55fe4SÁlvaro Fernández Rojas /* enable dma rx channel */
205*55e55fe4SÁlvaro Fernández Rojas dma_enable(&priv->rx_dma);
206*55e55fe4SÁlvaro Fernández Rojas
207*55e55fe4SÁlvaro Fernández Rojas /* enable dma tx channel */
208*55e55fe4SÁlvaro Fernández Rojas dma_enable(&priv->tx_dma);
209*55e55fe4SÁlvaro Fernández Rojas
210*55e55fe4SÁlvaro Fernández Rojas ret = phy_startup(priv->phy_dev);
211*55e55fe4SÁlvaro Fernández Rojas if (ret) {
212*55e55fe4SÁlvaro Fernández Rojas pr_err("%s: could not initialize phy\n", __func__);
213*55e55fe4SÁlvaro Fernández Rojas return ret;
214*55e55fe4SÁlvaro Fernández Rojas }
215*55e55fe4SÁlvaro Fernández Rojas
216*55e55fe4SÁlvaro Fernández Rojas if (!priv->phy_dev->link) {
217*55e55fe4SÁlvaro Fernández Rojas pr_err("%s: no phy link\n", __func__);
218*55e55fe4SÁlvaro Fernández Rojas return -EIO;
219*55e55fe4SÁlvaro Fernández Rojas }
220*55e55fe4SÁlvaro Fernández Rojas
221*55e55fe4SÁlvaro Fernández Rojas bcm6348_eth_adjust_link(dev, priv->phy_dev);
222*55e55fe4SÁlvaro Fernández Rojas
223*55e55fe4SÁlvaro Fernández Rojas /* zero mib counters */
224*55e55fe4SÁlvaro Fernández Rojas for (i = 0; i < MIB_REG_CNT; i++)
225*55e55fe4SÁlvaro Fernández Rojas writel_be(0, MIB_REG(i));
226*55e55fe4SÁlvaro Fernández Rojas
227*55e55fe4SÁlvaro Fernández Rojas /* enable rx flow control */
228*55e55fe4SÁlvaro Fernández Rojas setbits_be32(priv->base + ETH_RXCFG_REG, ETH_RXCFG_ENFLOW_MASK);
229*55e55fe4SÁlvaro Fernández Rojas
230*55e55fe4SÁlvaro Fernández Rojas /* set max rx/tx length */
231*55e55fe4SÁlvaro Fernández Rojas writel_be((ETH_MAX_MTU_SIZE << ETH_RXMAXLEN_SHIFT) &
232*55e55fe4SÁlvaro Fernández Rojas ETH_RXMAXLEN_MASK, priv->base + ETH_RXMAXLEN_REG);
233*55e55fe4SÁlvaro Fernández Rojas writel_be((ETH_MAX_MTU_SIZE << ETH_TXMAXLEN_SHIFT) &
234*55e55fe4SÁlvaro Fernández Rojas ETH_TXMAXLEN_MASK, priv->base + ETH_TXMAXLEN_REG);
235*55e55fe4SÁlvaro Fernández Rojas
236*55e55fe4SÁlvaro Fernández Rojas /* set correct transmit fifo watermark */
237*55e55fe4SÁlvaro Fernández Rojas writel_be((ETH_TX_WATERMARK << ETH_TXWMARK_WM_SHIFT) &
238*55e55fe4SÁlvaro Fernández Rojas ETH_TXWMARK_WM_MASK, priv->base + ETH_TXWMARK_REG);
239*55e55fe4SÁlvaro Fernández Rojas
240*55e55fe4SÁlvaro Fernández Rojas /* enable emac */
241*55e55fe4SÁlvaro Fernández Rojas bcm6348_eth_mac_enable(priv);
242*55e55fe4SÁlvaro Fernández Rojas
243*55e55fe4SÁlvaro Fernández Rojas /* clear interrupts */
244*55e55fe4SÁlvaro Fernández Rojas writel_be(0, priv->base + ETH_IRMASK_REG);
245*55e55fe4SÁlvaro Fernández Rojas
246*55e55fe4SÁlvaro Fernández Rojas return 0;
247*55e55fe4SÁlvaro Fernández Rojas }
248*55e55fe4SÁlvaro Fernández Rojas
bcm6348_eth_stop(struct udevice * dev)249*55e55fe4SÁlvaro Fernández Rojas static void bcm6348_eth_stop(struct udevice *dev)
250*55e55fe4SÁlvaro Fernández Rojas {
251*55e55fe4SÁlvaro Fernández Rojas struct bcm6348_eth_priv *priv = dev_get_priv(dev);
252*55e55fe4SÁlvaro Fernández Rojas
253*55e55fe4SÁlvaro Fernández Rojas /* disable dma rx channel */
254*55e55fe4SÁlvaro Fernández Rojas dma_disable(&priv->rx_dma);
255*55e55fe4SÁlvaro Fernández Rojas
256*55e55fe4SÁlvaro Fernández Rojas /* disable dma tx channel */
257*55e55fe4SÁlvaro Fernández Rojas dma_disable(&priv->tx_dma);
258*55e55fe4SÁlvaro Fernández Rojas
259*55e55fe4SÁlvaro Fernández Rojas /* disable emac */
260*55e55fe4SÁlvaro Fernández Rojas bcm6348_eth_mac_disable(priv);
261*55e55fe4SÁlvaro Fernández Rojas }
262*55e55fe4SÁlvaro Fernández Rojas
bcm6348_eth_write_hwaddr(struct udevice * dev)263*55e55fe4SÁlvaro Fernández Rojas static int bcm6348_eth_write_hwaddr(struct udevice *dev)
264*55e55fe4SÁlvaro Fernández Rojas {
265*55e55fe4SÁlvaro Fernández Rojas struct eth_pdata *pdata = dev_get_platdata(dev);
266*55e55fe4SÁlvaro Fernández Rojas struct bcm6348_eth_priv *priv = dev_get_priv(dev);
267*55e55fe4SÁlvaro Fernández Rojas bool running = false;
268*55e55fe4SÁlvaro Fernández Rojas
269*55e55fe4SÁlvaro Fernández Rojas /* check if emac is running */
270*55e55fe4SÁlvaro Fernández Rojas if (readl_be(priv->base + ETH_CTL_REG) & ETH_CTL_ENABLE_MASK)
271*55e55fe4SÁlvaro Fernández Rojas running = true;
272*55e55fe4SÁlvaro Fernández Rojas
273*55e55fe4SÁlvaro Fernández Rojas /* disable emac */
274*55e55fe4SÁlvaro Fernández Rojas if (running)
275*55e55fe4SÁlvaro Fernández Rojas bcm6348_eth_mac_disable(priv);
276*55e55fe4SÁlvaro Fernández Rojas
277*55e55fe4SÁlvaro Fernández Rojas /* set mac address */
278*55e55fe4SÁlvaro Fernández Rojas writel_be((pdata->enetaddr[2] << 24) | (pdata->enetaddr[3]) << 16 |
279*55e55fe4SÁlvaro Fernández Rojas (pdata->enetaddr[4]) << 8 | (pdata->enetaddr[5]),
280*55e55fe4SÁlvaro Fernández Rojas priv->base + ETH_PML_REG(0));
281*55e55fe4SÁlvaro Fernández Rojas writel_be((pdata->enetaddr[1]) | (pdata->enetaddr[0] << 8) |
282*55e55fe4SÁlvaro Fernández Rojas ETH_PMH_VALID_MASK, priv->base + ETH_PMH_REG(0));
283*55e55fe4SÁlvaro Fernández Rojas
284*55e55fe4SÁlvaro Fernández Rojas /* enable emac */
285*55e55fe4SÁlvaro Fernández Rojas if (running)
286*55e55fe4SÁlvaro Fernández Rojas bcm6348_eth_mac_enable(priv);
287*55e55fe4SÁlvaro Fernández Rojas
288*55e55fe4SÁlvaro Fernández Rojas return 0;
289*55e55fe4SÁlvaro Fernández Rojas }
290*55e55fe4SÁlvaro Fernández Rojas
291*55e55fe4SÁlvaro Fernández Rojas static const struct eth_ops bcm6348_eth_ops = {
292*55e55fe4SÁlvaro Fernández Rojas .free_pkt = bcm6348_eth_free_pkt,
293*55e55fe4SÁlvaro Fernández Rojas .recv = bcm6348_eth_recv,
294*55e55fe4SÁlvaro Fernández Rojas .send = bcm6348_eth_send,
295*55e55fe4SÁlvaro Fernández Rojas .start = bcm6348_eth_start,
296*55e55fe4SÁlvaro Fernández Rojas .stop = bcm6348_eth_stop,
297*55e55fe4SÁlvaro Fernández Rojas .write_hwaddr = bcm6348_eth_write_hwaddr,
298*55e55fe4SÁlvaro Fernández Rojas };
299*55e55fe4SÁlvaro Fernández Rojas
300*55e55fe4SÁlvaro Fernández Rojas static const struct udevice_id bcm6348_eth_ids[] = {
301*55e55fe4SÁlvaro Fernández Rojas { .compatible = "brcm,bcm6348-enet", },
302*55e55fe4SÁlvaro Fernández Rojas { /* sentinel */ }
303*55e55fe4SÁlvaro Fernández Rojas };
304*55e55fe4SÁlvaro Fernández Rojas
bcm6348_mdio_op(void __iomem * base,uint32_t data)305*55e55fe4SÁlvaro Fernández Rojas static int bcm6348_mdio_op(void __iomem *base, uint32_t data)
306*55e55fe4SÁlvaro Fernández Rojas {
307*55e55fe4SÁlvaro Fernández Rojas /* make sure mii interrupt status is cleared */
308*55e55fe4SÁlvaro Fernández Rojas writel_be(ETH_IR_MII_MASK, base + ETH_IR_REG);
309*55e55fe4SÁlvaro Fernández Rojas
310*55e55fe4SÁlvaro Fernández Rojas /* issue mii op */
311*55e55fe4SÁlvaro Fernández Rojas writel_be(data, base + MII_DAT_REG);
312*55e55fe4SÁlvaro Fernández Rojas
313*55e55fe4SÁlvaro Fernández Rojas /* wait until emac is disabled */
314*55e55fe4SÁlvaro Fernández Rojas return wait_for_bit_be32(base + ETH_IR_REG,
315*55e55fe4SÁlvaro Fernández Rojas ETH_IR_MII_MASK, true,
316*55e55fe4SÁlvaro Fernández Rojas ETH_TIMEOUT, false);
317*55e55fe4SÁlvaro Fernández Rojas }
318*55e55fe4SÁlvaro Fernández Rojas
bcm6348_mdio_read(struct mii_dev * bus,int addr,int devaddr,int reg)319*55e55fe4SÁlvaro Fernández Rojas static int bcm6348_mdio_read(struct mii_dev *bus, int addr, int devaddr,
320*55e55fe4SÁlvaro Fernández Rojas int reg)
321*55e55fe4SÁlvaro Fernández Rojas {
322*55e55fe4SÁlvaro Fernández Rojas void __iomem *base = bus->priv;
323*55e55fe4SÁlvaro Fernández Rojas uint32_t val;
324*55e55fe4SÁlvaro Fernández Rojas
325*55e55fe4SÁlvaro Fernández Rojas val = MII_DAT_OP_READ;
326*55e55fe4SÁlvaro Fernández Rojas val |= (reg << MII_DAT_REG_SHIFT) & MII_DAT_REG_MASK;
327*55e55fe4SÁlvaro Fernández Rojas val |= (0x2 << MII_DAT_TA_SHIFT) & MII_DAT_TA_MASK;
328*55e55fe4SÁlvaro Fernández Rojas val |= (addr << MII_DAT_PHY_SHIFT) & MII_DAT_PHY_MASK;
329*55e55fe4SÁlvaro Fernández Rojas
330*55e55fe4SÁlvaro Fernández Rojas if (bcm6348_mdio_op(base, val)) {
331*55e55fe4SÁlvaro Fernández Rojas pr_err("%s: timeout\n", __func__);
332*55e55fe4SÁlvaro Fernández Rojas return -EINVAL;
333*55e55fe4SÁlvaro Fernández Rojas }
334*55e55fe4SÁlvaro Fernández Rojas
335*55e55fe4SÁlvaro Fernández Rojas val = readl_be(base + MII_DAT_REG) & MII_DAT_DATA_MASK;
336*55e55fe4SÁlvaro Fernández Rojas val >>= MII_DAT_DATA_SHIFT;
337*55e55fe4SÁlvaro Fernández Rojas
338*55e55fe4SÁlvaro Fernández Rojas return val;
339*55e55fe4SÁlvaro Fernández Rojas }
340*55e55fe4SÁlvaro Fernández Rojas
bcm6348_mdio_write(struct mii_dev * bus,int addr,int dev_addr,int reg,u16 value)341*55e55fe4SÁlvaro Fernández Rojas static int bcm6348_mdio_write(struct mii_dev *bus, int addr, int dev_addr,
342*55e55fe4SÁlvaro Fernández Rojas int reg, u16 value)
343*55e55fe4SÁlvaro Fernández Rojas {
344*55e55fe4SÁlvaro Fernández Rojas void __iomem *base = bus->priv;
345*55e55fe4SÁlvaro Fernández Rojas uint32_t val;
346*55e55fe4SÁlvaro Fernández Rojas
347*55e55fe4SÁlvaro Fernández Rojas val = MII_DAT_OP_WRITE;
348*55e55fe4SÁlvaro Fernández Rojas val |= (reg << MII_DAT_REG_SHIFT) & MII_DAT_REG_MASK;
349*55e55fe4SÁlvaro Fernández Rojas val |= (0x2 << MII_DAT_TA_SHIFT) & MII_DAT_TA_MASK;
350*55e55fe4SÁlvaro Fernández Rojas val |= (addr << MII_DAT_PHY_SHIFT) & MII_DAT_PHY_MASK;
351*55e55fe4SÁlvaro Fernández Rojas val |= (value << MII_DAT_DATA_SHIFT) & MII_DAT_DATA_MASK;
352*55e55fe4SÁlvaro Fernández Rojas
353*55e55fe4SÁlvaro Fernández Rojas if (bcm6348_mdio_op(base, val)) {
354*55e55fe4SÁlvaro Fernández Rojas pr_err("%s: timeout\n", __func__);
355*55e55fe4SÁlvaro Fernández Rojas return -EINVAL;
356*55e55fe4SÁlvaro Fernández Rojas }
357*55e55fe4SÁlvaro Fernández Rojas
358*55e55fe4SÁlvaro Fernández Rojas return 0;
359*55e55fe4SÁlvaro Fernández Rojas }
360*55e55fe4SÁlvaro Fernández Rojas
bcm6348_mdio_init(const char * name,void __iomem * base)361*55e55fe4SÁlvaro Fernández Rojas static int bcm6348_mdio_init(const char *name, void __iomem *base)
362*55e55fe4SÁlvaro Fernández Rojas {
363*55e55fe4SÁlvaro Fernández Rojas struct mii_dev *bus;
364*55e55fe4SÁlvaro Fernández Rojas
365*55e55fe4SÁlvaro Fernández Rojas bus = mdio_alloc();
366*55e55fe4SÁlvaro Fernández Rojas if (!bus) {
367*55e55fe4SÁlvaro Fernández Rojas pr_err("%s: failed to allocate MDIO bus\n", __func__);
368*55e55fe4SÁlvaro Fernández Rojas return -ENOMEM;
369*55e55fe4SÁlvaro Fernández Rojas }
370*55e55fe4SÁlvaro Fernández Rojas
371*55e55fe4SÁlvaro Fernández Rojas bus->read = bcm6348_mdio_read;
372*55e55fe4SÁlvaro Fernández Rojas bus->write = bcm6348_mdio_write;
373*55e55fe4SÁlvaro Fernández Rojas bus->priv = base;
374*55e55fe4SÁlvaro Fernández Rojas snprintf(bus->name, sizeof(bus->name), "%s", name);
375*55e55fe4SÁlvaro Fernández Rojas
376*55e55fe4SÁlvaro Fernández Rojas return mdio_register(bus);
377*55e55fe4SÁlvaro Fernández Rojas }
378*55e55fe4SÁlvaro Fernández Rojas
bcm6348_phy_init(struct udevice * dev)379*55e55fe4SÁlvaro Fernández Rojas static int bcm6348_phy_init(struct udevice *dev)
380*55e55fe4SÁlvaro Fernández Rojas {
381*55e55fe4SÁlvaro Fernández Rojas struct eth_pdata *pdata = dev_get_platdata(dev);
382*55e55fe4SÁlvaro Fernández Rojas struct bcm6348_eth_priv *priv = dev_get_priv(dev);
383*55e55fe4SÁlvaro Fernández Rojas struct mii_dev *bus;
384*55e55fe4SÁlvaro Fernández Rojas
385*55e55fe4SÁlvaro Fernández Rojas /* get mii bus */
386*55e55fe4SÁlvaro Fernández Rojas bus = miiphy_get_dev_by_name(dev->name);
387*55e55fe4SÁlvaro Fernández Rojas
388*55e55fe4SÁlvaro Fernández Rojas /* phy connect */
389*55e55fe4SÁlvaro Fernández Rojas priv->phy_dev = phy_connect(bus, priv->phy_id, dev,
390*55e55fe4SÁlvaro Fernández Rojas pdata->phy_interface);
391*55e55fe4SÁlvaro Fernández Rojas if (!priv->phy_dev) {
392*55e55fe4SÁlvaro Fernández Rojas pr_err("%s: no phy device\n", __func__);
393*55e55fe4SÁlvaro Fernández Rojas return -ENODEV;
394*55e55fe4SÁlvaro Fernández Rojas }
395*55e55fe4SÁlvaro Fernández Rojas
396*55e55fe4SÁlvaro Fernández Rojas priv->phy_dev->supported = (SUPPORTED_10baseT_Half |
397*55e55fe4SÁlvaro Fernández Rojas SUPPORTED_10baseT_Full |
398*55e55fe4SÁlvaro Fernández Rojas SUPPORTED_100baseT_Half |
399*55e55fe4SÁlvaro Fernández Rojas SUPPORTED_100baseT_Full |
400*55e55fe4SÁlvaro Fernández Rojas SUPPORTED_Autoneg |
401*55e55fe4SÁlvaro Fernández Rojas SUPPORTED_Pause |
402*55e55fe4SÁlvaro Fernández Rojas SUPPORTED_MII);
403*55e55fe4SÁlvaro Fernández Rojas priv->phy_dev->advertising = priv->phy_dev->supported;
404*55e55fe4SÁlvaro Fernández Rojas
405*55e55fe4SÁlvaro Fernández Rojas /* phy config */
406*55e55fe4SÁlvaro Fernández Rojas phy_config(priv->phy_dev);
407*55e55fe4SÁlvaro Fernández Rojas
408*55e55fe4SÁlvaro Fernández Rojas return 0;
409*55e55fe4SÁlvaro Fernández Rojas }
410*55e55fe4SÁlvaro Fernández Rojas
bcm6348_eth_probe(struct udevice * dev)411*55e55fe4SÁlvaro Fernández Rojas static int bcm6348_eth_probe(struct udevice *dev)
412*55e55fe4SÁlvaro Fernández Rojas {
413*55e55fe4SÁlvaro Fernández Rojas struct eth_pdata *pdata = dev_get_platdata(dev);
414*55e55fe4SÁlvaro Fernández Rojas struct bcm6348_eth_priv *priv = dev_get_priv(dev);
415*55e55fe4SÁlvaro Fernández Rojas struct ofnode_phandle_args phy;
416*55e55fe4SÁlvaro Fernández Rojas const char *phy_mode;
417*55e55fe4SÁlvaro Fernández Rojas int ret, i;
418*55e55fe4SÁlvaro Fernández Rojas
419*55e55fe4SÁlvaro Fernández Rojas /* get base address */
420*55e55fe4SÁlvaro Fernández Rojas priv->base = dev_remap_addr(dev);
421*55e55fe4SÁlvaro Fernández Rojas if (!priv->base)
422*55e55fe4SÁlvaro Fernández Rojas return -EINVAL;
423*55e55fe4SÁlvaro Fernández Rojas pdata->iobase = (phys_addr_t) priv->base;
424*55e55fe4SÁlvaro Fernández Rojas
425*55e55fe4SÁlvaro Fernández Rojas /* get phy mode */
426*55e55fe4SÁlvaro Fernández Rojas pdata->phy_interface = PHY_INTERFACE_MODE_NONE;
427*55e55fe4SÁlvaro Fernández Rojas phy_mode = dev_read_string(dev, "phy-mode");
428*55e55fe4SÁlvaro Fernández Rojas if (phy_mode)
429*55e55fe4SÁlvaro Fernández Rojas pdata->phy_interface = phy_get_interface_by_name(phy_mode);
430*55e55fe4SÁlvaro Fernández Rojas if (pdata->phy_interface == PHY_INTERFACE_MODE_NONE)
431*55e55fe4SÁlvaro Fernández Rojas return -ENODEV;
432*55e55fe4SÁlvaro Fernández Rojas
433*55e55fe4SÁlvaro Fernández Rojas /* get phy */
434*55e55fe4SÁlvaro Fernández Rojas if (dev_read_phandle_with_args(dev, "phy", NULL, 0, 0, &phy))
435*55e55fe4SÁlvaro Fernández Rojas return -ENOENT;
436*55e55fe4SÁlvaro Fernández Rojas priv->phy_id = ofnode_read_u32_default(phy.node, "reg", -1);
437*55e55fe4SÁlvaro Fernández Rojas
438*55e55fe4SÁlvaro Fernández Rojas /* get dma channels */
439*55e55fe4SÁlvaro Fernández Rojas ret = dma_get_by_name(dev, "tx", &priv->tx_dma);
440*55e55fe4SÁlvaro Fernández Rojas if (ret)
441*55e55fe4SÁlvaro Fernández Rojas return -EINVAL;
442*55e55fe4SÁlvaro Fernández Rojas
443*55e55fe4SÁlvaro Fernández Rojas ret = dma_get_by_name(dev, "rx", &priv->rx_dma);
444*55e55fe4SÁlvaro Fernández Rojas if (ret)
445*55e55fe4SÁlvaro Fernández Rojas return -EINVAL;
446*55e55fe4SÁlvaro Fernández Rojas
447*55e55fe4SÁlvaro Fernández Rojas /* try to enable clocks */
448*55e55fe4SÁlvaro Fernández Rojas for (i = 0; ; i++) {
449*55e55fe4SÁlvaro Fernández Rojas struct clk clk;
450*55e55fe4SÁlvaro Fernández Rojas int ret;
451*55e55fe4SÁlvaro Fernández Rojas
452*55e55fe4SÁlvaro Fernández Rojas ret = clk_get_by_index(dev, i, &clk);
453*55e55fe4SÁlvaro Fernández Rojas if (ret < 0)
454*55e55fe4SÁlvaro Fernández Rojas break;
455*55e55fe4SÁlvaro Fernández Rojas
456*55e55fe4SÁlvaro Fernández Rojas ret = clk_enable(&clk);
457*55e55fe4SÁlvaro Fernández Rojas if (ret < 0) {
458*55e55fe4SÁlvaro Fernández Rojas pr_err("%s: error enabling clock %d\n", __func__, i);
459*55e55fe4SÁlvaro Fernández Rojas return ret;
460*55e55fe4SÁlvaro Fernández Rojas }
461*55e55fe4SÁlvaro Fernández Rojas
462*55e55fe4SÁlvaro Fernández Rojas ret = clk_free(&clk);
463*55e55fe4SÁlvaro Fernández Rojas if (ret < 0) {
464*55e55fe4SÁlvaro Fernández Rojas pr_err("%s: error freeing clock %d\n", __func__, i);
465*55e55fe4SÁlvaro Fernández Rojas return ret;
466*55e55fe4SÁlvaro Fernández Rojas }
467*55e55fe4SÁlvaro Fernández Rojas }
468*55e55fe4SÁlvaro Fernández Rojas
469*55e55fe4SÁlvaro Fernández Rojas /* try to perform resets */
470*55e55fe4SÁlvaro Fernández Rojas for (i = 0; ; i++) {
471*55e55fe4SÁlvaro Fernández Rojas struct reset_ctl reset;
472*55e55fe4SÁlvaro Fernández Rojas int ret;
473*55e55fe4SÁlvaro Fernández Rojas
474*55e55fe4SÁlvaro Fernández Rojas ret = reset_get_by_index(dev, i, &reset);
475*55e55fe4SÁlvaro Fernández Rojas if (ret < 0)
476*55e55fe4SÁlvaro Fernández Rojas break;
477*55e55fe4SÁlvaro Fernández Rojas
478*55e55fe4SÁlvaro Fernández Rojas ret = reset_deassert(&reset);
479*55e55fe4SÁlvaro Fernández Rojas if (ret < 0) {
480*55e55fe4SÁlvaro Fernández Rojas pr_err("%s: error deasserting reset %d\n", __func__, i);
481*55e55fe4SÁlvaro Fernández Rojas return ret;
482*55e55fe4SÁlvaro Fernández Rojas }
483*55e55fe4SÁlvaro Fernández Rojas
484*55e55fe4SÁlvaro Fernández Rojas ret = reset_free(&reset);
485*55e55fe4SÁlvaro Fernández Rojas if (ret < 0) {
486*55e55fe4SÁlvaro Fernández Rojas pr_err("%s: error freeing reset %d\n", __func__, i);
487*55e55fe4SÁlvaro Fernández Rojas return ret;
488*55e55fe4SÁlvaro Fernández Rojas }
489*55e55fe4SÁlvaro Fernández Rojas }
490*55e55fe4SÁlvaro Fernández Rojas
491*55e55fe4SÁlvaro Fernández Rojas /* disable emac */
492*55e55fe4SÁlvaro Fernández Rojas bcm6348_eth_mac_disable(priv);
493*55e55fe4SÁlvaro Fernández Rojas
494*55e55fe4SÁlvaro Fernández Rojas /* reset emac */
495*55e55fe4SÁlvaro Fernández Rojas bcm6348_eth_mac_reset(priv);
496*55e55fe4SÁlvaro Fernández Rojas
497*55e55fe4SÁlvaro Fernández Rojas /* select correct mii interface */
498*55e55fe4SÁlvaro Fernández Rojas if (pdata->phy_interface == PHY_INTERFACE_MODE_INTERNAL)
499*55e55fe4SÁlvaro Fernández Rojas clrbits_be32(priv->base + ETH_CTL_REG, ETH_CTL_EPHY_MASK);
500*55e55fe4SÁlvaro Fernández Rojas else
501*55e55fe4SÁlvaro Fernández Rojas setbits_be32(priv->base + ETH_CTL_REG, ETH_CTL_EPHY_MASK);
502*55e55fe4SÁlvaro Fernández Rojas
503*55e55fe4SÁlvaro Fernández Rojas /* turn on mdc clock */
504*55e55fe4SÁlvaro Fernández Rojas writel_be((0x1f << MII_SC_MDCFREQDIV_SHIFT) |
505*55e55fe4SÁlvaro Fernández Rojas MII_SC_PREAMBLE_EN_MASK, priv->base + MII_SC_REG);
506*55e55fe4SÁlvaro Fernández Rojas
507*55e55fe4SÁlvaro Fernández Rojas /* set mib counters to not clear when read */
508*55e55fe4SÁlvaro Fernández Rojas clrbits_be32(priv->base + MIB_CTL_REG, MIB_CTL_RDCLEAR_MASK);
509*55e55fe4SÁlvaro Fernández Rojas
510*55e55fe4SÁlvaro Fernández Rojas /* initialize perfect match registers */
511*55e55fe4SÁlvaro Fernández Rojas for (i = 0; i < ETH_PM_CNT; i++) {
512*55e55fe4SÁlvaro Fernández Rojas writel_be(0, priv->base + ETH_PML_REG(i));
513*55e55fe4SÁlvaro Fernández Rojas writel_be(0, priv->base + ETH_PMH_REG(i));
514*55e55fe4SÁlvaro Fernández Rojas }
515*55e55fe4SÁlvaro Fernández Rojas
516*55e55fe4SÁlvaro Fernández Rojas /* init mii bus */
517*55e55fe4SÁlvaro Fernández Rojas ret = bcm6348_mdio_init(dev->name, priv->base);
518*55e55fe4SÁlvaro Fernández Rojas if (ret)
519*55e55fe4SÁlvaro Fernández Rojas return ret;
520*55e55fe4SÁlvaro Fernández Rojas
521*55e55fe4SÁlvaro Fernández Rojas /* init phy */
522*55e55fe4SÁlvaro Fernández Rojas ret = bcm6348_phy_init(dev);
523*55e55fe4SÁlvaro Fernández Rojas if (ret)
524*55e55fe4SÁlvaro Fernández Rojas return ret;
525*55e55fe4SÁlvaro Fernández Rojas
526*55e55fe4SÁlvaro Fernández Rojas return 0;
527*55e55fe4SÁlvaro Fernández Rojas }
528*55e55fe4SÁlvaro Fernández Rojas
529*55e55fe4SÁlvaro Fernández Rojas U_BOOT_DRIVER(bcm6348_eth) = {
530*55e55fe4SÁlvaro Fernández Rojas .name = "bcm6348_eth",
531*55e55fe4SÁlvaro Fernández Rojas .id = UCLASS_ETH,
532*55e55fe4SÁlvaro Fernández Rojas .of_match = bcm6348_eth_ids,
533*55e55fe4SÁlvaro Fernández Rojas .ops = &bcm6348_eth_ops,
534*55e55fe4SÁlvaro Fernández Rojas .platdata_auto_alloc_size = sizeof(struct eth_pdata),
535*55e55fe4SÁlvaro Fernández Rojas .priv_auto_alloc_size = sizeof(struct bcm6348_eth_priv),
536*55e55fe4SÁlvaro Fernández Rojas .probe = bcm6348_eth_probe,
537*55e55fe4SÁlvaro Fernández Rojas };
538