Searched refs:write_gicreg (Results 1 – 4 of 4) sorted by relevance
| /openbmc/linux/arch/arm64/kvm/hyp/ |
| H A D | vgic-v3-sr.c | 65 write_gicreg(val, ICH_LR0_EL2); in __gic_v3_set_lr()
68 write_gicreg(val, ICH_LR1_EL2); in __gic_v3_set_lr()
71 write_gicreg(val, ICH_LR2_EL2); in __gic_v3_set_lr()
74 write_gicreg(val, ICH_LR3_EL2); in __gic_v3_set_lr()
77 write_gicreg(val, ICH_LR4_EL2); in __gic_v3_set_lr()
80 write_gicreg(val, ICH_LR5_EL2); in __gic_v3_set_lr()
83 write_gicreg(val, ICH_LR6_EL2); in __gic_v3_set_lr()
86 write_gicreg(val, ICH_LR7_EL2); in __gic_v3_set_lr()
89 write_gicreg(val, ICH_LR8_EL2); in __gic_v3_set_lr()
92 write_gicreg(val, ICH_LR9_EL2); in __gic_v3_set_lr()
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| /openbmc/linux/drivers/irqchip/ |
| H A D | irq-gic-v3.c | 625 write_gicreg(gic_irq(d), ICC_EOIR1_EL1); in gic_eoi_irq()
726 write_gicreg(irqnr, ICC_EOIR1_EL1); in gic_deactivate_unhandled()
753 write_gicreg(irqnr, ICC_EOIR1_EL1); in gic_complete_ack()
1159 write_gicreg(DEFAULT_PMR_VALUE, ICC_PMR_EL1); in gic_cpu_sys_reg_init()
1197 write_gicreg(0, ICC_AP0R3_EL1); in gic_cpu_sys_reg_init()
1198 write_gicreg(0, ICC_AP0R2_EL1); in gic_cpu_sys_reg_init()
1201 write_gicreg(0, ICC_AP0R1_EL1); in gic_cpu_sys_reg_init()
1205 write_gicreg(0, ICC_AP0R0_EL1); in gic_cpu_sys_reg_init()
1214 write_gicreg(0, ICC_AP1R3_EL1); in gic_cpu_sys_reg_init()
1215 write_gicreg(0, ICC_AP1R2_EL1); in gic_cpu_sys_reg_init()
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| /openbmc/linux/arch/arm64/include/asm/ |
| H A D | arch_gicv3.h | 20 #define write_gicreg(v, r) write_sysreg_s(v, SYS_ ## r) macro
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| /openbmc/linux/arch/arm/include/asm/ |
| H A D | arch_gicv3.h | 63 #define write_gicreg(v, r) write_##r(v) in CPUIF_MAP() macro
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