Searched refs:wregs (Results 1 – 7 of 7) sorted by relevance
297 s->wregs[W_CMD] = 0; in escc_soft_reset_chn()299 s->wregs[W_RXCTRL] &= ~RXCTRL_RXEN; in escc_soft_reset_chn()335 s->wregs[W_MISC1] = 0; in escc_hard_reset_chn()336 s->wregs[W_CLOCK] = CLOCK_TRXC; in escc_hard_reset_chn()358 cs->wregs[j] = 0; in escc_reset()514 speed = s->clock / ((s->wregs[W_BRGLO] | (s->wregs[W_BRGHI] << 8)) + 2); in escc_update_parameters()580 s->wregs[s->reg] = val; in escc_mem_write()589 s->wregs[s->reg] = val; in escc_mem_write()592 s->wregs[s->reg] = val; in escc_mem_write()607 s->wregs[s->reg] = val; in escc_mem_write()[all …]
27 struct sgiseeq_wregs wregs; member
305 sregs->rw.wregs.control = sp->control; in init_seeq()306 sregs->rw.wregs.frame_gap = 0; in init_seeq()425 sregs->rw.wregs.control = sp->control & ~(SEEQ_CTRL_XCNT); in tx_maybe_reset_collisions()426 sregs->rw.wregs.control = sp->control; in tx_maybe_reset_collisions()
37 uint8_t wregs[ESCC_SERIAL_REGS], rregs[ESCC_SERIAL_REGS]; member
236 dmalen = s->wregs[ESP_TCLO]; in esp_get_stc()237 dmalen |= s->wregs[ESP_TCMID] << 8; in esp_get_stc()238 dmalen |= s->wregs[ESP_TCHI] << 16; in esp_get_stc()267 target = s->wregs[ESP_WBUSID] & BUSID_DID; in esp_select()1088 memset(s->wregs, 0, ESP_REGS); in esp_hard_reset()1149 if (!(s->wregs[ESP_CFG1] & CFG1_RESREPT)) { in esp_run_cmd()1257 trace_esp_mem_writeb(saddr, s->wregs[saddr], val); in esp_reg_write()1289 s->wregs[saddr] = val; in esp_reg_write()1373 VMSTATE_BUFFER(wregs, ESPState),
228 current = s->wregs[addr >> 2]; in esp_pci_io_write()
26 uint8_t wregs[ESP_REGS]; member