Home
last modified time | relevance | path

Searched refs:valp (Results 1 – 25 of 30) sorted by relevance

12

/openbmc/u-boot/include/
H A Dregmap.h122 int regmap_read(struct regmap *map, uint offset, uint *valp);
156 int regmap_raw_read(struct regmap *map, uint offset, void *valp,
188 void *valp, size_t val_len);
226 #define regmap_range_get(map, range, type, member, valp) \ argument
228 (void *)valp, sizeof(((type *)0)->member))
239 #define regmap_get(map, type, member, valp) \ argument
240 regmap_range_get(map, 0, type, member, valp)
/openbmc/qemu/fsdev/
H A D9p-iov-marshal.c82 uint8_t *valp = va_arg(ap, uint8_t *); in v9fs_iov_vunmarshal() local
83 copied = v9fs_unpack(valp, out_sg, out_num, offset, sizeof(*valp)); in v9fs_iov_vunmarshal()
87 uint16_t val = 0, *valp; in v9fs_iov_vunmarshal() local
88 valp = va_arg(ap, uint16_t *); in v9fs_iov_vunmarshal()
94 *valp = le16_to_cpu(val); in v9fs_iov_vunmarshal()
96 *valp = val; in v9fs_iov_vunmarshal()
101 uint32_t val = 0, *valp; in v9fs_iov_vunmarshal() local
102 valp = va_arg(ap, uint32_t *); in v9fs_iov_vunmarshal()
108 *valp = le32_to_cpu(val); in v9fs_iov_vunmarshal()
110 *valp = val; in v9fs_iov_vunmarshal()
[all …]
/openbmc/qemu/target/xtensa/core-lx106/
H A Dxtensa-modules.c.inc1275 Operand_art_decode (uint32 *valp ATTRIBUTE_UNUSED)
1281 Operand_art_encode (uint32 *valp)
1284 error = (*valp & ~0xf) != 0;
1289 Operand_ars_decode (uint32 *valp ATTRIBUTE_UNUSED)
1295 Operand_ars_encode (uint32 *valp)
1298 error = (*valp & ~0xf) != 0;
1303 Operand_arr_decode (uint32 *valp ATTRIBUTE_UNUSED)
1309 Operand_arr_encode (uint32 *valp)
1312 error = (*valp & ~0xf) != 0;
1317 Operand_ar0_decode (uint32 *valp ATTRIBUTE_UNUSED)
[all …]
/openbmc/qemu/target/xtensa/core-fsf/
H A Dxtensa-modules.c.inc1299 Operand_soffsetx4_decode (uint32 *valp)
1302 offset_0 = *valp & 0x3ffff;
1304 *valp = soffsetx4_0;
1309 Operand_soffsetx4_encode (uint32 *valp)
1312 soffsetx4_0 = *valp;
1314 *valp = offset_0;
1319 Operand_soffsetx4_ator (uint32 *valp, uint32 pc)
1321 *valp -= (pc & ~0x3);
1326 Operand_soffsetx4_rtoa (uint32 *valp, uint32 pc)
1328 *valp += (pc & ~0x3);
[all …]
/openbmc/qemu/target/xtensa/core-sample_controller/
H A Dxtensa-modules.c.inc1499 OperandSem_opnd_sem_soffsetx4_decode (uint32 *valp)
1503 soffsetx4_in_0 = *valp & 0x3ffff;
1505 *valp = soffsetx4_out_0;
1510 OperandSem_opnd_sem_soffsetx4_encode (uint32 *valp)
1514 soffsetx4_out_0 = *valp;
1516 *valp = soffsetx4_in_0;
1521 OperandSem_opnd_sem_uimm12x8_decode (uint32 *valp)
1525 uimm12x8_in_0 = *valp & 0xfff;
1527 *valp = uimm12x8_out_0;
1532 OperandSem_opnd_sem_uimm12x8_encode (uint32 *valp)
[all …]
/openbmc/qemu/target/xtensa/core-de212/
H A Dxtensa-modules.c.inc1711 OperandSem_opnd_sem_MR_0_decode (uint32 *valp)
1713 *valp += 2;
1718 OperandSem_opnd_sem_MR_0_encode (uint32 *valp)
1721 error = ((*valp & ~0x3) != 0) || ((*valp & 0x2) == 0);
1722 *valp = *valp & 1;
1727 OperandSem_opnd_sem_soffsetx4_decode (uint32 *valp)
1731 soffsetx4_in_0 = *valp & 0x3ffff;
1733 *valp = soffsetx4_out_0;
1738 OperandSem_opnd_sem_soffsetx4_encode (uint32 *valp)
1742 soffsetx4_out_0 = *valp;
[all …]
/openbmc/qemu/target/xtensa/core-dc233c/
H A Dxtensa-modules.c.inc1738 Operand_soffsetx4_decode (uint32 *valp)
1741 offset_0 = *valp & 0x3ffff;
1743 *valp = soffsetx4_0;
1748 Operand_soffsetx4_encode (uint32 *valp)
1751 soffsetx4_0 = *valp;
1753 *valp = offset_0;
1758 Operand_soffsetx4_ator (uint32 *valp, uint32 pc)
1760 *valp -= (pc & ~0x3);
1765 Operand_soffsetx4_rtoa (uint32 *valp, uint32 pc)
1767 *valp += (pc & ~0x3);
[all …]
/openbmc/qemu/target/xtensa/core-dc232b/
H A Dxtensa-modules.c.inc1656 Operand_soffsetx4_decode (uint32 *valp)
1659 offset_0 = *valp & 0x3ffff;
1661 *valp = soffsetx4_0;
1666 Operand_soffsetx4_encode (uint32 *valp)
1669 soffsetx4_0 = *valp;
1671 *valp = offset_0;
1676 Operand_soffsetx4_ator (uint32 *valp, uint32 pc)
1678 *valp -= (pc & ~0x3);
1683 Operand_soffsetx4_rtoa (uint32 *valp, uint32 pc)
1685 *valp += (pc & ~0x3);
[all …]
/openbmc/openbmc/poky/meta/recipes-devtools/unifdef/unifdef/
H A D0001-Don-t-use-C23-constexpr-keyword.patch27 @@ -1086,7 +1086,7 @@ eval_unary(const struct ops *ops, long *valp, const char **cpp)
28 *valp = (value[sym] != NULL);
29 lt = *valp ? LT_TRUE : LT_FALSE;
36 @@ -1103,7 +1103,7 @@ eval_unary(const struct ops *ops, long *valp, const char **cpp)
37 lt = *valp ? LT_TRUE : LT_FALSE;
/openbmc/u-boot/drivers/core/
H A Dregmap.c250 void *valp, size_t val_len) in regmap_raw_read_range() argument
271 *((u8 *)valp) = __read_8(ptr, map->endianness); in regmap_raw_read_range()
274 *((u16 *)valp) = __read_16(ptr, map->endianness); in regmap_raw_read_range()
277 *((u32 *)valp) = __read_32(ptr, map->endianness); in regmap_raw_read_range()
281 *((u64 *)valp) = __read_64(ptr, map->endianness); in regmap_raw_read_range()
292 int regmap_raw_read(struct regmap *map, uint offset, void *valp, size_t val_len) in regmap_raw_read() argument
294 return regmap_raw_read_range(map, 0, offset, valp, val_len); in regmap_raw_read()
297 int regmap_read(struct regmap *map, uint offset, uint *valp) in regmap_read() argument
299 return regmap_raw_read(map, offset, valp, REGMAP_SIZE_32); in regmap_read()
/openbmc/qemu/target/xtensa/core-de233_fpu/
H A Dxtensa-modules.c.inc2718 OperandSem_opnd_sem_MR_0_decode (uint32 *valp)
2720 *valp += 2;
2725 OperandSem_opnd_sem_MR_0_encode (uint32 *valp)
2728 error = ((*valp & ~0x3) != 0) || ((*valp & 0x2) == 0);
2729 *valp = *valp & 1;
2734 OperandSem_opnd_sem_soffsetx4_decode (uint32 *valp)
2738 soffsetx4_in_0 = *valp & 0x3ffff;
2740 *valp = soffsetx4_out_0;
2745 OperandSem_opnd_sem_soffsetx4_encode (uint32 *valp)
2749 soffsetx4_out_0 = *valp;
[all …]
/openbmc/u-boot/drivers/misc/
H A Dihs_fpga.h48 #define ihs_fpga_get(map, member, valp) \ argument
49 regmap_get(map, struct ihs_fpga_regs, member, valp)
H A Dgdsys_rxaui_ctrl.c27 #define rxaui_ctrl_get(map, member, valp) \ argument
28 regmap_get(map, struct gdsys_rxaui_ctrl_regs, member, valp)
H A Dgdsys_ioep.h61 #define gdsys_ioep_get(map, member, valp) \ argument
62 regmap_get(map, struct gdsys_ioep_regs, member, valp)
/openbmc/qemu/include/hw/xtensa/
H A Dxtensa-isa.h492 const xtensa_insnbuf slotbuf, uint32_t *valp);
507 uint32_t *valp);
510 uint32_t *valp);
578 uint32_t *valp, uint32_t pc);
581 uint32_t *valp, uint32_t pc);
/openbmc/qemu/target/xtensa/
H A Dxtensa-isa.c917 const xtensa_insnbuf slotbuf, uint32_t *valp) in xtensa_operand_get_field() argument
946 *valp = (*get_fn)(slotbuf); in xtensa_operand_get_field()
988 uint32_t *valp) in xtensa_operand_encode() argument
1031 (*set_fn)(tmpbuf, *valp); in xtensa_operand_encode()
1032 return (*get_fn)(tmpbuf) != *valp; in xtensa_operand_encode()
1048 orig_val = *valp; in xtensa_operand_encode()
1049 if ((*intop->encode)(valp) || in xtensa_operand_encode()
1050 (test_val = *valp, (*intop->decode)(&test_val)) || in xtensa_operand_encode()
1053 sprintf(xtisa_error_msg, "cannot encode operand value 0x%08x", *valp); in xtensa_operand_encode()
1062 uint32_t *valp) in xtensa_operand_decode() argument
[all …]
/openbmc/qemu/target/xtensa/core-test_mmuhifi_c3/
H A Dxtensa-modules.c.inc9293 OperandSem_opnd_sem_soffsetx4_decode (uint32 *valp)
9297 soffsetx4_in_0 = *valp & 0x3ffff;
9299 *valp = soffsetx4_out_0;
9304 OperandSem_opnd_sem_soffsetx4_encode (uint32 *valp)
9308 soffsetx4_out_0 = *valp;
9310 *valp = soffsetx4_in_0;
9315 OperandSem_opnd_sem_uimm12x8_decode (uint32 *valp)
9319 uimm12x8_in_0 = *valp & 0xfff;
9321 *valp = uimm12x8_out_0;
9326 OperandSem_opnd_sem_uimm12x8_encode (uint32 *valp)
[all …]
/openbmc/u-boot/drivers/power/
H A Dtwl4030.c202 int twl4030_i2c_read_u8(u8 chip_no, u8 reg, u8 *valp) in twl4030_i2c_read_u8() argument
217 *valp = (u8)ret; in twl4030_i2c_read_u8()
H A Dpalmas.c198 int palmas_i2c_read_u8(u8 chip_no, u8 reg, u8 *valp) in palmas_i2c_read_u8() argument
213 *valp = (u8)ret; in palmas_i2c_read_u8()
H A Dtwl6030.c291 int twl6030_i2c_read_u8(u8 chip_no, u8 reg, u8 *valp) in twl6030_i2c_read_u8() argument
306 *valp = (u8)ret; in twl6030_i2c_read_u8()
/openbmc/qemu/target/xtensa/core-test_kc705_be/
H A Dxtensa-modules.c.inc10878 OperandSem_opnd_sem_MR_0_decode (uint32 *valp)
10880 *valp += 2;
10885 OperandSem_opnd_sem_MR_0_encode (uint32 *valp)
10888 error = ((*valp & ~0x3) != 0) || ((*valp & 0x2) == 0);
10889 *valp = *valp & 1;
10894 OperandSem_opnd_sem_soffsetx4_decode (uint32 *valp)
10898 soffsetx4_in_0 = *valp & 0x3ffff;
10900 *valp = soffsetx4_out_0;
10905 OperandSem_opnd_sem_soffsetx4_encode (uint32 *valp)
10909 soffsetx4_out_0 = *valp;
[all …]
/openbmc/u-boot/cmd/
H A Ddate.c132 static int cnvrt2 (const char *str, int *valp) in cnvrt2() argument
146 *valp = 10 * val + (*str - '0'); in cnvrt2()
/openbmc/u-boot/drivers/axi/
H A Dihs_axi.c61 #define ihs_axi_get(map, member, valp) \ argument
62 regmap_get(map, struct ihs_axi_regs, member, valp)
/openbmc/u-boot/scripts/dtc/libfdt/
H A Dfdt_sw.c223 int fdt_property_placeholder(void *fdt, const char *name, int len, void **valp) in fdt_property_placeholder() argument
241 *valp = prop->data; in fdt_property_placeholder()
/openbmc/qemu/target/xtensa/core-dsp3400/
H A Dxtensa-modules.c.inc41322 Operand_soffsetx4_decode (uint32 *valp)
41325 offset_0 = *valp & 0x3ffff;
41327 *valp = soffsetx4_0;
41332 Operand_soffsetx4_encode (uint32 *valp)
41335 soffsetx4_0 = *valp;
41337 *valp = offset_0;
41342 Operand_soffsetx4_ator (uint32 *valp, uint32 pc)
41344 *valp -= (pc & ~0x3);
41349 Operand_soffsetx4_rtoa (uint32 *valp, uint32 pc)
41351 *valp += (pc & ~0x3);
[all …]

12