| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| H A D | dcn_calc_auto.c | 67 v->h_ratio[k] = v->h_ratio[k] * v->under_scan_factor; in scaler_settings_calculation()
68 v->v_ratio[k] = v->v_ratio[k] * v->under_scan_factor; in scaler_settings_calculation()
132 …v->h_ratio[k] > v->max_hscl_ratio || v->v_ratio[k] > v->max_vscl_ratio || v->h_ratio[k] > v->htaps… in mode_support_and_system_configuration()
340 …v->min_dppclk_using_single_dpp[k] = v->pixel_clock[k] *dcn_bw_max5(v->vtaps[k] / 6.0 *dcn_bw_min2(… in mode_support_and_system_configuration()
747 …v->v_init_y = (v->v_ratio[k] + v->vtaps[k] + 1.0 + v->interlace_output[k] * 0.5 * v->v_ratio[k]) /… in mode_support_and_system_configuration()
802 …v->line_times_for_prefetch[k] = v->maximum_vstartup - v->urgent_latency / (v->htotal[k] / v->pixel… in mode_support_and_system_configuration()
1006 v->dcfclk = v->dcfclk_per_state[v->voltage_level]; in mode_support_and_system_configuration()
1223 v->dppclk = v->dispclk / v->dispclk_dppclk_ratio; in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
1393 v->v_blank_time = (v->vtotal[k] - v->vactive[k]) * v->htotal[k] / v->pixel_clock[k]; in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
1643 …v->dstx_after_scaler = 90.0 * v->pixel_clock[k] / v->dppclk + 42.0 * v->pixel_clock[k] / v->dispcl… in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
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| /openbmc/linux/include/linux/atomic/ |
| H A D | atomic-instrumented.h | 32 instrument_atomic_read(v, sizeof(*v)); in atomic_read()
49 instrument_atomic_read(v, sizeof(*v)); in atomic_read_acquire()
67 instrument_atomic_write(v, sizeof(*v)); in atomic_set()
86 instrument_atomic_write(v, sizeof(*v)); in atomic_set_release()
104 instrument_atomic_read_write(v, sizeof(*v)); in atomic_add()
123 instrument_atomic_read_write(v, sizeof(*v)); in atomic_add_return()
141 instrument_atomic_read_write(v, sizeof(*v)); in atomic_add_return_acquire()
160 instrument_atomic_read_write(v, sizeof(*v)); in atomic_add_return_release()
178 instrument_atomic_read_write(v, sizeof(*v)); in atomic_add_return_relaxed()
1596 instrument_atomic_read(v, sizeof(*v)); in atomic64_read()
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| H A D | atomic-long.h | 40 return raw_atomic_read(v); in raw_atomic_long_read()
79 raw_atomic64_set(v, i); in raw_atomic_long_set()
81 raw_atomic_set(v, i); in raw_atomic_long_set()
121 raw_atomic64_add(i, v); in raw_atomic_long_add()
123 raw_atomic_add(i, v); in raw_atomic_long_add()
312 raw_atomic_sub(i, v); in raw_atomic_long_sub()
498 raw_atomic64_inc(v); in raw_atomic_long_inc()
500 raw_atomic_inc(v); in raw_atomic_long_inc()
678 raw_atomic64_dec(v); in raw_atomic_long_dec()
680 raw_atomic_dec(v); in raw_atomic_long_dec()
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| H A D | atomic-arch-fallback.h | 490 arch_atomic_set(v, i); in raw_atomic_set()
514 raw_atomic_set(v, i); in raw_atomic_set_release()
533 arch_atomic_add(i, v); in raw_atomic_add()
756 arch_atomic_sub(i, v); in raw_atomic_sub()
979 arch_atomic_inc(v); in raw_atomic_inc()
981 raw_atomic_add(1, v); in raw_atomic_inc()
1197 arch_atomic_dec(v); in raw_atomic_dec()
1199 raw_atomic_sub(1, v); in raw_atomic_dec()
1659 arch_atomic_or(i, v); in raw_atomic_or()
3091 arch_atomic64_inc(v); in raw_atomic64_inc()
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| /openbmc/linux/drivers/media/platform/nxp/ |
| H A D | imx-pxp.h | 219 #define BF_PXP_OUT_BUF_ADDR(v) (v) argument
225 #define BF_PXP_OUT_BUF2_ADDR(v) (v) argument
388 #define BF_PXP_PS_BUF_ADDR(v) (v) argument
394 #define BF_PXP_PS_UBUF_ADDR(v) (v) argument
400 #define BF_PXP_PS_VBUF_ADDR(v) (v) argument
545 #define BF_PXP_AS_BUF_ADDR(v) (v) argument
846 #define BF_PXP_LUT_DATA_DATA(v) (v) argument
852 #define BF_PXP_LUT_EXTMEM_ADDR(v) (v) argument
858 #define BF_PXP_CFA_DATA(v) (v) argument
1486 #define BF_PXP_INIT_MEM_DATA_DATA(v) (v) argument
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| /openbmc/u-boot/arch/arm/include/asm/arch-mx5/ |
| H A D | crm_regs.h | 80 #define MXC_CCM_CCR_OSCNT(v) ((v) & 0xFF) argument
92 #define MXC_CCM_CCSR_STEP_SEL(v) (((v) & 0x3) << 7) argument
109 #define MXC_CCM_CACRR_ARM_PODF(v) ((v) & 0x7) argument
116 #define MXC_CCM_CBCDR_DDR_PODF(v) (((v) & 0x7) << 27) argument
122 #define MXC_CCM_CBCDR_EMI_PODF(v) (((v) & 0x7) << 22) argument
134 #define MXC_CCM_CBCDR_NFC_PODF(v) (((v) & 0x7) << 13) argument
138 #define MXC_CCM_CBCDR_AHB_PODF(v) (((v) & 0x7) << 10) argument
142 #define MXC_CCM_CBCDR_IPG_PODF(v) (((v) & 0x3) << 8) argument
154 #define MXC_CCM_CBCDR_PERCLK_PODF(v) ((v) & 0x7) argument
333 #define MXC_CCM_CCGR0_DAP(v) (((v) & 0x3) << 8) argument
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| /openbmc/u-boot/arch/arm/include/asm/arch-vf610/ |
| H A D | imx-regs.h | 132 #define DDRMC_CR10_TRST_PWRON(v) (v) argument
133 #define DDRMC_CR11_CKE_INACTIVE(v) (v) argument
147 #define DDRMC_CR17_TMOD(v) ((v) & 0xff) argument
149 #define DDRMC_CR18_TCKE(v) ((v) & 0x7) argument
156 #define DDRMC_CR23_TDLL(v) ((v) & 0xffff) argument
157 #define DDRMC_CR24_TRP_AB(v) ((v) & 0x1f) argument
160 #define DDRMC_CR26_TRFC(v) ((v) & 0x3ff) argument
165 #define DDRMC_CR31_TXSR(v) ((v) & 0xffff) argument
178 #define DDRMC_CR67_ZQCS(v) ((v) & 0xfff) argument
180 #define DDRMC_CR70_REF_PER_ZQ(v) (v) argument
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| H A D | display_mode_vba_30.c | 1872 v->DRAMSpeedPerState[v->VoltageLevel] * v->NumberOfChannels * v->DRAMChannelWidth, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2078 …v->ReadBandwidthPlaneLuma[k] = v->SwathWidthSingleDPPY[k] * v->BytePerPixelY[k] / (v->HTotal[k] / … in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2079 …v->ReadBandwidthPlaneChroma[k] = v->SwathWidthSingleDPPC[k] * v->BytePerPixelC[k] / (v->HTotal[k] … in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2161 v->DSCDelay[k] = v->DSCDelay[k] * v->PixelClock[k] / v->PixelClockBackEnd[k]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2394 v->WritebackDelay[v->VoltageLevel][k] = v->WritebackDelay[v->VoltageLevel][j]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2397 …v->MaxVStartupLines[k] = v->VTotal[k] - v->VActive[k] - dml_max(1.0, dml_ceil((double) v->Writebac… in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3984 …if (!(v->MaxDispclk[i] == v->MaxDispclk[v->soc.num_states - 1] && v->MaxDppclk[i] == v->MaxDppclk[… in dml30_ModeSupportAndSystemConfigurationFull()
4333 …v->cursor_bw[k] = v->NumberOfCursors[k] * v->CursorWidth[k][0] * v->CursorBPP[k][0] / 8.0 / (v->HT… in dml30_ModeSupportAndSystemConfigurationFull()
4871 …v->cursor_bw_pre[k] = v->NumberOfCursors[k] * v->CursorWidth[k][0] * v->CursorBPP[k][0] / 8.0 / (v… in dml30_ModeSupportAndSystemConfigurationFull()
5120 …if (v->AlignedYPitch[k] > v->PitchY[k] || v->AlignedCPitch[k] > v->PitchC[k] || v->AlignedDCCMetaP… in dml30_ModeSupportAndSystemConfigurationFull()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | display_mode_vba_31.c | 2016 v->ReturnBusWidth * v->DCFCLKState[v->VoltageLevel][v->maxMpcComb],
2293 v->DSCDelay[k] = v->DSCDelay[k] * v->PixelClock[k] / v->PixelClockBackEnd[k];
2549 v->WritebackDelay[v->VoltageLevel][k] = v->WritebackDelay[v->VoltageLevel][j];
3110 v->MinTTUVBlank[k] = v->TCalc + v->MinTTUVBlank[k];
3173 (int) (v->VTotal[k] - v->VActive[k] - v->VFrontPorch[k] - v->VStartup[k]))) {
3833 || v->VRatio[k] > v->MaxVSCLRatio || v->HRatio[k] > v->htaps[k]
3883 / (v->HTotal[k] / v->PixelClock[k]) * v->VRatio[k];
5431 if (v->AlignedYPitch[k] > v->PitchY[k] || v->AlignedCPitch[k] > v->PitchC[k]
5549 v->SOCCLK = v->SOCCLKPerState[v->VoltageLevel];
5672 …- ((double) v->DSTXAfterScaler[k] / v->HTotal[k] + v->DSTYAfterScaler[k]) * v->HTotal[k] / v->Pixe…
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| H A D | display_mode_vba_314.c | 2036 v->ReturnBusWidth * v->DCFCLKState[v->VoltageLevel][v->maxMpcComb],
2314 v->DSCDelay[k] = v->DSCDelay[k] * v->PixelClock[k] / v->PixelClockBackEnd[k];
2570 v->WritebackDelay[v->VoltageLevel][k] = v->WritebackDelay[v->VoltageLevel][j];
3131 v->MinTTUVBlank[k] = v->TCalc + v->MinTTUVBlank[k];
3185 …v->MIN_DST_Y_NEXT_START[k] = dml_floor((v->VTotal[k] - v->VFrontPorch[k] + v->VTotal[k] - v->VActi…
3187 …v->MIN_DST_Y_NEXT_START[k] = v->VTotal[k] - v->VFrontPorch[k] + v->VTotal[k] - v->VActive[k] - v->…
3928 || v->VRatio[k] > v->MaxVSCLRatio || v->HRatio[k] > v->htaps[k]
5518 if (v->AlignedYPitch[k] > v->PitchY[k] || v->AlignedCPitch[k] > v->PitchC[k]
5644 v->SOCCLK = v->SOCCLKPerState[v->VoltageLevel];
5767 …- ((double) v->DSTXAfterScaler[k] / v->HTotal[k] + v->DSTYAfterScaler[k]) * v->HTotal[k] / v->Pixe…
[all …]
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| /openbmc/linux/drivers/media/platform/verisilicon/ |
| H A D | rockchip_vpu2_hw_h264_dec.c | 28 #define VDPU_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument
30 #define VDPU_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(11) : 0) argument
31 #define VDPU_REG_DEC_SCMD_DIS(v) ((v) ? BIT(10) : 0) argument
32 #define VDPU_REG_FILTERING_DIS(v) ((v) ? BIT(8) : 0) argument
33 #define VDPU_REG_PIC_FIXED_QUANT(v) ((v) ? BIT(7) : 0) argument
50 #define VDPU_REG_DEC_IN_ENDIAN(v) ((v) ? BIT(0) : 0) argument
57 #define VDPU_REG_START_CODE_E(v) ((v) ? BIT(22) : 0) argument
59 #define VDPU_REG_RLC_MODE_E(v) ((v) ? BIT(20) : 0) argument
64 #define VDPU_REG_SEQ_MBAFF_E(v) ((v) ? BIT(7) : 0) argument
73 #define VDPU_REG_REFBU_E(v) ((v) ? BIT(31) : 0) argument
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| /openbmc/linux/drivers/staging/media/sunxi/sun6i-isp/ |
| H A D | sun6i_isp_reg.h | 21 #define SUN6I_ISP_FE_CFG_SRC0_MODE(v) (((v) << 8) & GENMASK(9, 8)) argument
104 #define SUN6I_ISP_MODE_INPUT_FMT(v) ((v) & GENMASK(2, 0)) argument
106 #define SUN6I_ISP_MODE_OTF_DPC(v) (((v) << 16) & BIT(16)) argument
107 #define SUN6I_ISP_MODE_SHARP(v) (((v) << 17) & BIT(17)) argument
139 #define SUN6I_ISP_AE_SIZE_WIDTH(v) ((v) & GENMASK(10, 0)) argument
149 #define SUN6I_ISP_OB_SIZE_WIDTH(v) ((v) & GENMASK(13, 0)) argument
153 #define SUN6I_ISP_OB_VALID_WIDTH(v) ((v) & GENMASK(12, 0)) argument
202 #define SUN6I_ISP_BAYER_GAIN0_R(v) ((v) & GENMASK(11, 0)) argument
212 #define SUN6I_ISP_WB_GAIN0_R(v) ((v) & GENMASK(11, 0)) argument
216 #define SUN6I_ISP_WB_GAIN1_GB(v) ((v) & GENMASK(11, 0)) argument
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| /openbmc/linux/drivers/gpu/host1x/hw/ |
| H A D | hw_host1x01_uclass.h | 50 return (v & 0xff) << 8; in host1x_uclass_incr_syncpt_cond_f()
56 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f()
68 return (v & 0xff) << 24; in host1x_uclass_wait_syncpt_indx_f()
86 return (v & 0xff) << 24; in host1x_uclass_wait_syncpt_base_indx_f()
92 return (v & 0xff) << 16; in host1x_uclass_wait_syncpt_base_base_indx_f()
98 return (v & 0xffff) << 0; in host1x_uclass_wait_syncpt_base_offset_f()
110 return (v & 0xff) << 24; in host1x_uclass_load_syncpt_base_base_indx_f()
122 return (v & 0xff) << 24; in host1x_uclass_incr_syncpt_base_base_indx_f()
140 return (v & 0xf) << 28; in host1x_uclass_indoff_indbe_f()
146 return (v & 0x1) << 27; in host1x_uclass_indoff_autoinc_f()
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| H A D | hw_host1x04_uclass.h | 50 return (v & 0xff) << 8; in host1x_uclass_incr_syncpt_cond_f()
56 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f()
68 return (v & 0xff) << 24; in host1x_uclass_wait_syncpt_indx_f()
86 return (v & 0xff) << 24; in host1x_uclass_wait_syncpt_base_indx_f()
92 return (v & 0xff) << 16; in host1x_uclass_wait_syncpt_base_base_indx_f()
98 return (v & 0xffff) << 0; in host1x_uclass_wait_syncpt_base_offset_f()
110 return (v & 0xff) << 24; in host1x_uclass_load_syncpt_base_base_indx_f()
122 return (v & 0xff) << 24; in host1x_uclass_incr_syncpt_base_base_indx_f()
140 return (v & 0xf) << 28; in host1x_uclass_indoff_indbe_f()
146 return (v & 0x1) << 27; in host1x_uclass_indoff_autoinc_f()
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| H A D | hw_host1x05_uclass.h | 50 return (v & 0xff) << 8; in host1x_uclass_incr_syncpt_cond_f()
56 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f()
68 return (v & 0xff) << 24; in host1x_uclass_wait_syncpt_indx_f()
86 return (v & 0xff) << 24; in host1x_uclass_wait_syncpt_base_indx_f()
92 return (v & 0xff) << 16; in host1x_uclass_wait_syncpt_base_base_indx_f()
98 return (v & 0xffff) << 0; in host1x_uclass_wait_syncpt_base_offset_f()
110 return (v & 0xff) << 24; in host1x_uclass_load_syncpt_base_base_indx_f()
122 return (v & 0xff) << 24; in host1x_uclass_incr_syncpt_base_base_indx_f()
140 return (v & 0xf) << 28; in host1x_uclass_indoff_indbe_f()
146 return (v & 0x1) << 27; in host1x_uclass_indoff_autoinc_f()
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| H A D | hw_host1x02_uclass.h | 50 return (v & 0xff) << 8; in host1x_uclass_incr_syncpt_cond_f()
56 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f()
68 return (v & 0xff) << 24; in host1x_uclass_wait_syncpt_indx_f()
86 return (v & 0xff) << 24; in host1x_uclass_wait_syncpt_base_indx_f()
92 return (v & 0xff) << 16; in host1x_uclass_wait_syncpt_base_base_indx_f()
98 return (v & 0xffff) << 0; in host1x_uclass_wait_syncpt_base_offset_f()
110 return (v & 0xff) << 24; in host1x_uclass_load_syncpt_base_base_indx_f()
122 return (v & 0xff) << 24; in host1x_uclass_incr_syncpt_base_base_indx_f()
140 return (v & 0xf) << 28; in host1x_uclass_indoff_indbe_f()
146 return (v & 0x1) << 27; in host1x_uclass_indoff_autoinc_f()
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| H A D | hw_host1x08_uclass.h | 50 return (v & 0xff) << 10; in host1x_uclass_incr_syncpt_cond_f()
56 return (v & 0x3ff) << 0; in host1x_uclass_incr_syncpt_indx_f()
68 return (v & 0xff) << 24; in host1x_uclass_wait_syncpt_indx_f()
86 return (v & 0xff) << 24; in host1x_uclass_wait_syncpt_base_indx_f()
92 return (v & 0xff) << 16; in host1x_uclass_wait_syncpt_base_base_indx_f()
98 return (v & 0xffff) << 0; in host1x_uclass_wait_syncpt_base_offset_f()
110 return (v & 0xff) << 24; in host1x_uclass_load_syncpt_base_base_indx_f()
122 return (v & 0xff) << 24; in host1x_uclass_incr_syncpt_base_base_indx_f()
140 return (v & 0xf) << 28; in host1x_uclass_indoff_indbe_f()
146 return (v & 0x1) << 27; in host1x_uclass_indoff_autoinc_f()
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| H A D | hw_host1x07_uclass.h | 50 return (v & 0xff) << 10; in host1x_uclass_incr_syncpt_cond_f()
56 return (v & 0x3ff) << 0; in host1x_uclass_incr_syncpt_indx_f()
68 return (v & 0xff) << 24; in host1x_uclass_wait_syncpt_indx_f()
86 return (v & 0xff) << 24; in host1x_uclass_wait_syncpt_base_indx_f()
92 return (v & 0xff) << 16; in host1x_uclass_wait_syncpt_base_base_indx_f()
98 return (v & 0xffff) << 0; in host1x_uclass_wait_syncpt_base_offset_f()
110 return (v & 0xff) << 24; in host1x_uclass_load_syncpt_base_base_indx_f()
122 return (v & 0xff) << 24; in host1x_uclass_incr_syncpt_base_base_indx_f()
140 return (v & 0xf) << 28; in host1x_uclass_indoff_indbe_f()
146 return (v & 0x1) << 27; in host1x_uclass_indoff_autoinc_f()
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| H A D | hw_host1x06_uclass.h | 50 return (v & 0xff) << 10; in host1x_uclass_incr_syncpt_cond_f()
56 return (v & 0x3ff) << 0; in host1x_uclass_incr_syncpt_indx_f()
68 return (v & 0xff) << 24; in host1x_uclass_wait_syncpt_indx_f()
86 return (v & 0xff) << 24; in host1x_uclass_wait_syncpt_base_indx_f()
92 return (v & 0xff) << 16; in host1x_uclass_wait_syncpt_base_base_indx_f()
98 return (v & 0xffff) << 0; in host1x_uclass_wait_syncpt_base_offset_f()
110 return (v & 0xff) << 24; in host1x_uclass_load_syncpt_base_base_indx_f()
122 return (v & 0xff) << 24; in host1x_uclass_incr_syncpt_base_base_indx_f()
140 return (v & 0xf) << 28; in host1x_uclass_indoff_indbe_f()
146 return (v & 0x1) << 27; in host1x_uclass_indoff_autoinc_f()
[all …]
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| /openbmc/linux/sound/soc/qcom/ |
| H A D | lpass-lpaif-reg.h | 12 (v->i2sctrl_reg_base + (addr) + v->i2sctrl_reg_stride * (port))
14 #define LPAIF_I2SCTL_REG(v, port) LPAIF_I2SCTL_REG_ADDR(v, 0x0, (port)) argument
69 (v->irq_reg_base + (addr) + v->irq_reg_stride * (port))
73 #define LPAIF_IRQEN_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0x0, (port)) argument
74 #define LPAIF_IRQSTAT_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0x4, (port)) argument
79 (v->rxtx_irq_reg_base + (addr) + v->rxtx_irq_reg_stride * (port))
87 (v->va_irq_reg_base + (addr) + v->va_irq_reg_stride * (port))
125 (v->rdma_reg_base + (addr) + v->rdma_reg_stride * (chan))
138 v->wrdma_reg_stride * (chan - v->wrdma_channel_start))
185 (v->va_rdma_reg_base + (addr) + v->va_rdma_reg_stride * (chan)))
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| /openbmc/linux/drivers/iio/adc/ |
| H A D | stm32-dfsdm.h | 115 #define DFSDM_CR1_DFEN(v) FIELD_PREP(DFSDM_CR1_DFEN_MASK, v) argument
137 #define DFSDM_CR1_RCH(v) FIELD_PREP(DFSDM_CR1_RCH_MASK, v) argument
139 #define DFSDM_CR1_FAST(v) FIELD_PREP(DFSDM_CR1_FAST_MASK, v) argument
145 #define DFSDM_CR2_IE(v) FIELD_PREP(DFSDM_CR2_IE_MASK, v) argument
161 #define DFSDM_CR2_EXCH(v) FIELD_PREP(DFSDM_CR2_EXCH_MASK, v) argument
175 #define DFSDM_ISR_AWDF(v) FIELD_PREP(DFSDM_ISR_AWDF_MASK, v) argument
177 #define DFSDM_ISR_JCIP(v) FIELD_PREP(DFSDM_ISR_JCIP_MASK, v) argument
179 #define DFSDM_ISR_RCIP(v) FIELD_PREP(DFSDM_ISR_RCIP, v) argument
183 #define DFSDM_ISR_SCDF(v) FIELD_PREP(DFSDM_ISR_SCDF_MASK, v) argument
203 #define DFSDM_FCR_IOSR(v) FIELD_PREP(DFSDM_FCR_IOSR_MASK, v) argument
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| /openbmc/linux/arch/sh/mm/ |
| H A D | flush-sh4.c | 25 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
26 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
27 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
28 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
29 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
30 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
31 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
32 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
37 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
59 __ocbp(v); v += L1_CACHE_BYTES; in sh4__flush_purge_region()
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| /openbmc/qemu/qapi/ |
| H A D | qapi-visit-core.c | 32 v->complete(v, opaque); in visit_complete()
40 v->free(v); in visit_free()
64 return v->check_struct ? v->check_struct(v, errp) : true; in visit_check_struct()
70 v->end_struct(v, obj); in visit_end_struct()
91 return v->next_list(v, tail, size); in visit_next_list()
97 return v->check_list ? v->check_list(v, errp) : true; in visit_check_list()
103 v->end_list(v, obj); in visit_end_list()
130 v->end_alternate(v, obj); in visit_end_alternate()
138 v->optional(v, name, present); in visit_optional()
349 ok = v->type_str(v, name, obj, errp); in visit_type_str()
[all …]
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| /openbmc/linux/arch/x86/lib/ |
| H A D | atomic64_386_32.S | 41 #undef v
49 #undef v
59 #undef v
67 #undef v
77 #undef v
85 #undef v
98 #undef v
106 #undef v
118 #undef v
126 #undef v
[all …]
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| /openbmc/linux/drivers/md/ |
| H A D | dm-verity-target.c | 156 if (likely(v->salt_size && (v->version >= 1))) in verity_hash_init()
157 r = verity_hash_update(v, req, v->salt, v->salt_size, wait); in verity_hash_init()
167 if (unlikely(v->salt_size && (!v->version))) { in verity_hash_final()
168 r = verity_hash_update(v, req, v->salt, v->salt_size, wait); in verity_hash_final()
324 r = verity_hash(v, verity_io_hash_req(v, io), in verity_verify_level()
567 struct dm_verity *v = io->v; in verity_verify_io() local
683 struct dm_verity *v = io->v; in verity_finish_io() local
729 struct dm_verity *v = pw->v; in verity_prefetch_io() local
787 pw->v = v; in verity_submit_prefetch()
821 io->v = v; in verity_map()
[all …]
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