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Searched refs:tx_ring (Results 1 – 13 of 13) sorted by relevance

/openbmc/u-boot/drivers/net/
H A Deepro100.c197 static struct TxFD tx_ring[NUM_TX_DESC]; /* TX descriptor ring */ variable
521 cfg_cmd = (struct descriptor *) &tx_ring[tx_cur]; in eepro100_init()
524 cfg_cmd->link = cpu_to_le32 (phys_to_bus ((u32) & tx_ring[tx_next])); in eepro100_init()
534 OUTL (dev, phys_to_bus ((u32) & tx_ring[tx_cur]), SCBPointer); in eepro100_init()
538 !(le16_to_cpu (tx_ring[tx_cur].status) & CONFIG_SYS_STATUS_C); in eepro100_init()
546 if (!(le16_to_cpu (tx_ring[tx_cur].status) & CONFIG_SYS_STATUS_OK)) { in eepro100_init()
548 le16_to_cpu (tx_ring[tx_cur].status)); in eepro100_init()
557 ias_cmd = (struct descriptor *) &tx_ring[tx_cur]; in eepro100_init()
560 ias_cmd->link = cpu_to_le32 (phys_to_bus ((u32) & tx_ring[tx_next])); in eepro100_init()
571 OUTL (dev, phys_to_bus ((u32) & tx_ring[tx_cur]), SCBPointer); in eepro100_init()
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H A Ddc2114x.c135 static struct de4x5_desc tx_ring[NUM_TX_DESC] __attribute__ ((aligned(32))); /* TX descriptor ring … variable
344 tx_ring[i].status = 0; in dc21x4x_init()
345 tx_ring[i].des1 = 0; in dc21x4x_init()
346 tx_ring[i].buf = 0; in dc21x4x_init()
349 tx_ring[i].next = cpu_to_le32(phys_to_bus((u32) &tx_ring[(i+1) % NUM_TX_DESC])); in dc21x4x_init()
351 tx_ring[i].next = 0; in dc21x4x_init()
360 tx_ring[txRingSize - 1].des1 |= cpu_to_le32(TD_TER); in dc21x4x_init()
364 OUTL(dev, phys_to_bus((u32) &tx_ring), DE4X5_TRBA); in dc21x4x_init()
386 for(i = 0; tx_ring[tx_new].status & cpu_to_le32(T_OWN); i++) { in dc21x4x_send()
393 tx_ring[tx_new].buf = cpu_to_le32(phys_to_bus((u32) packet)); in dc21x4x_send()
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H A Dmt7628-eth.c144 struct fe_tx_dma *tx_ring; member
386 ret = wait_for_bit_le32(&priv->tx_ring[idx].txd2, TX_DMA_DONE, true, in mt7628_eth_send()
395 priv->tx_ring[idx].txd1 = CPHYSADDR(packet); in mt7628_eth_send()
396 priv->tx_ring[idx].txd2 &= ~TX_DMA_PLEN0; in mt7628_eth_send()
397 priv->tx_ring[idx].txd2 |= FIELD_PREP(TX_DMA_PLEN0, length); in mt7628_eth_send()
398 priv->tx_ring[idx].txd2 &= ~TX_DMA_DONE; in mt7628_eth_send()
484 memset((void *)&priv->tx_ring[i], 0, sizeof(priv->tx_ring[0])); in mt7628_eth_start()
485 priv->tx_ring[i].txd2 = TX_DMA_LS0 | TX_DMA_DONE; in mt7628_eth_start()
486 priv->tx_ring[i].txd4 = FIELD_PREP(TX_DMA_PN, 1); in mt7628_eth_start()
502 writel(CPHYSADDR((u32)&priv->tx_ring[0]), base + TX_BASE_PTR0); in mt7628_eth_start()
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H A Dpcnet.c69 u32 tx_ring; member
75 struct pcnet_tx_head tx_ring[TX_RING_SIZE]; member
378 uc->tx_ring[i].base = 0; in pcnet_init()
379 uc->tx_ring[i].status = 0; in pcnet_init()
396 addr = pcnet_virt_to_mem(dev, uc->tx_ring); in pcnet_init()
397 uc->init_block.tx_ring = cpu_to_le32(addr); in pcnet_init()
401 uc->init_block.rx_ring, uc->init_block.tx_ring); in pcnet_init()
438 struct pcnet_tx_head *entry = &lp->uc->tx_ring[lp->cur_tx]; in pcnet_send()
H A Dmacb.c114 struct macb_dma_desc *tx_ring; member
327 macb->tx_ring[tx_head].ctrl = ctrl; in _macb_send()
328 macb->tx_ring[tx_head].addr = paddr; in _macb_send()
342 ctrl = macb->tx_ring[tx_head].ctrl; in _macb_send()
681 macb->tx_ring[i].addr = 0; in _macb_init()
683 macb->tx_ring[i].ctrl = TXBUF_USED | TXBUF_WRAP; in _macb_init()
685 macb->tx_ring[i].ctrl = TXBUF_USED; in _macb_init()
877 macb->tx_ring = dma_alloc_coherent(MACB_TX_DMA_DESC_SIZE, in _macb_eth_initialize()
/openbmc/qemu/hw/net/
H A Dxen_nic.c59 netif_tx_back_ring_t tx_ring; member
72 RING_IDX i = netdev->tx_ring.rsp_prod_pvt; in OBJECT_DECLARE_SIMPLE_TYPE()
76 resp = RING_GET_RESPONSE(&netdev->tx_ring, i); in OBJECT_DECLARE_SIMPLE_TYPE()
82 RING_GET_RESPONSE(&netdev->tx_ring, ++i)->status = NETIF_RSP_NULL; in OBJECT_DECLARE_SIMPLE_TYPE()
86 netdev->tx_ring.rsp_prod_pvt = ++i; in OBJECT_DECLARE_SIMPLE_TYPE()
87 RING_PUSH_RESPONSES_AND_CHECK_NOTIFY(&netdev->tx_ring, notify); in OBJECT_DECLARE_SIMPLE_TYPE()
93 if (i == netdev->tx_ring.req_cons) { in OBJECT_DECLARE_SIMPLE_TYPE()
95 RING_FINAL_CHECK_FOR_REQUESTS(&netdev->tx_ring, more_to_do); in OBJECT_DECLARE_SIMPLE_TYPE()
109 RING_IDX cons = netdev->tx_ring.req_cons; in net_tx_error()
116 txp = RING_GET_REQUEST(&netdev->tx_ring, con in net_tx_error()
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H A Dftgmac100.c531 static void ftgmac100_do_tx(FTGMAC100State *s, uint64_t tx_ring, in ftgmac100_do_tx() argument
630 addr = tx_ring; in ftgmac100_do_tx()
698 s->tx_ring = 0; in ftgmac100_do_reset()
750 return extract64(s->tx_ring, 0, 32); in ftgmac100_read()
835 s->tx_ring = deposit64(s->tx_ring, 0, 32, value); in ftgmac100_write()
843 ftgmac100_do_tx(s, s->tx_ring, s->tx_descriptor); in ftgmac100_write()
942 val = extract64(s->tx_ring, 32, 32); in ftgmac100_high_read()
968 s->tx_ring = deposit64(s->tx_ring, 32, 32, value); in ftgmac100_high_write()
1250 VMSTATE_UINT64(tx_ring, FTGMAC100State),
H A Dvmxnet3_defs.h42 Vmxnet3Ring tx_ring; member
H A Dvmxnet3.c377 vmxnet3_ring_inc(&s->txq_descr[qidx].tx_ring); in vmxnet3_inc_tx_consumption_counter()
580 Vmxnet3Ring *ring = &s->txq_descr[qidx].tx_ring; in vmxnet3_pop_next_tx_descr()
1480 vmxnet3_ring_init(d, &s->txq_descr[i].tx_ring, pa, size, in vmxnet3_activate_device()
1482 VMXNET3_RING_DUMP(VMW_CFPRN, "TX", i, &s->txq_descr[i].tx_ring); in vmxnet3_activate_device()
2334 VMSTATE_STRUCT(tx_ring, Vmxnet3TxqDescr, 0, vmstate_vmxnet3_ring,
/openbmc/qemu/tests/qtest/libqos/
H A De1000e.c46 d->tx_ring + tail * E1000_RING_DESC_LEN, in e1000e_tx_ring_push()
52 d->tx_ring + tail * E1000_RING_DESC_LEN, in e1000e_tx_ring_push()
133 (uint32_t) d->e1000e.tx_ring); in e1000e_pci_start_hw()
135 (uint32_t) (d->e1000e.tx_ring >> 32)); in e1000e_pci_start_hw()
192 d->e1000e.tx_ring = guest_alloc(alloc, E1000E_RING_LEN); in e1000e_pci_create()
193 g_assert(d->e1000e.tx_ring != 0); in e1000e_pci_create()
H A Digb.c89 (uint32_t) d->e1000e.tx_ring); in igb_pci_start_hw()
91 (uint32_t) (d->e1000e.tx_ring >> 32)); in igb_pci_start_hw()
157 d->e1000e.tx_ring = guest_alloc(alloc, E1000E_RING_LEN); in igb_pci_create()
158 g_assert(d->e1000e.tx_ring != 0); in igb_pci_create()
H A De1000e.h34 uint64_t tx_ring; member
/openbmc/qemu/include/hw/net/
H A Dftgmac100.h62 uint64_t tx_ring; member