Searched refs:training_result (Results 1 – 10 of 10) sorted by relevance
186 return training_result[stage]; in ddr3_tip_get_result_ptr()386 (training_result[INIT_CONTROLLER] in ddr3_tip_print_log()393 (training_result[SET_LOW_FREQ] in ddr3_tip_print_log()400 (training_result[LOAD_PATTERN] in ddr3_tip_print_log()407 (training_result[SET_MEDIUM_FREQ] in ddr3_tip_print_log()414 (training_result[WRITE_LEVELING] in ddr3_tip_print_log()421 (training_result[LOAD_PATTERN_2] in ddr3_tip_print_log()428 (training_result[READ_LEVELING] in ddr3_tip_print_log()435 (training_result[WRITE_LEVELING_SUPP] in ddr3_tip_print_log()442 (training_result[PBS_RX] in ddr3_tip_print_log()[all …]
61 training_result[training_stage][if_id] = TEST_SUCCESS; in ddr3_tip_dynamic_read_leveling()231 training_result[training_stage][if_id] = in ddr3_tip_dynamic_read_leveling()305 if (training_result[training_stage][if_id] == TEST_FAILED) in ddr3_tip_dynamic_read_leveling()435 training_result[training_stage][if_id] = TEST_SUCCESS; in ddr3_tip_dynamic_per_bit_read_leveling()712 training_result[training_stage][if_id] = TEST_FAILED; in ddr3_tip_dynamic_per_bit_read_leveling()757 if (training_result[training_stage][if_id] == TEST_FAILED) in ddr3_tip_dynamic_per_bit_read_leveling()826 training_result[training_stage][if_id] = TEST_SUCCESS; in ddr3_tip_dynamic_write_leveling()1110 training_result[training_stage][if_id] = in ddr3_tip_dynamic_write_leveling()1164 if (training_result[training_stage][if_id] == TEST_FAILED) in ddr3_tip_dynamic_write_leveling()1269 training_result[training_stage][if_id] = TEST_FAILED; in ddr3_tip_dynamic_write_leveling_supp()[all …]
55 enum hws_training_ip_stat training_result[MAX_INTERFACE_NUM]; in ddr3_tip_centralization() local130 PARAM_NOT_CARE, training_result); in ddr3_tip_centralization()496 enum hws_training_ip_stat training_result[MAX_INTERFACE_NUM]; in ddr3_tip_special_rx() local543 PARAM_NOT_CARE, training_result); in ddr3_tip_special_rx()
89 extern enum hws_result training_result[MAX_STAGE_LIMIT][MAX_INTERFACE_NUM];
718 training_result[training_stage][if_id] in ddr3_tip_pbs()725 training_result[ in ddr3_tip_pbs()727 (training_result[training_stage] in ddr3_tip_pbs()
227 enum hws_training_ip_stat training_result; in mv_ddr_tip_bist() local234 TIP_ITERATION_NUM, pattern, EDGE_FP, CS_SINGLE, cs, &training_result); in mv_ddr_tip_bist()
39 enum hws_result training_result[MAX_STAGE_LIMIT][MAX_INTERFACE_NUM]; variable1055 training_result[training_stage][interface_num] = in ddr3_tip_if_polling()1207 enum hws_result *flow_result = training_result[training_stage]; in ddr3_tip_freq_set()1238 training_result[training_stage][if_id] = TEST_SUCCESS; in ddr3_tip_freq_set()2481 training_result[stage][if_id] = NO_TEST_DONE; in ddr3_tip_ddr3_auto_tune()2507 if (training_result[stage][if_id] == TEST_FAILED) in ddr3_tip_ddr3_auto_tune()
854 training_result[training_stage][if_id] = TEST_SUCCESS; in ddr3_tip_load_all_pattern_to_mem()
96 enum link_training_result training_result);
529 enum link_training_result training_result) in decide_fallback_link_setting_max_bw_policy() argument534 if (training_result == LINK_TRAINING_ABORT) in decide_fallback_link_setting_max_bw_policy()587 enum link_training_result training_result) in decide_fallback_link_setting() argument592 cur, training_result); in decide_fallback_link_setting()594 switch (training_result) { in decide_fallback_link_setting()604 if (training_result == LINK_TRAINING_CR_FAIL_LANE0) in decide_fallback_link_setting()606 else if (training_result == LINK_TRAINING_CR_FAIL_LANE1) in decide_fallback_link_setting()608 else if (training_result == LINK_TRAINING_CR_FAIL_LANE23) in decide_fallback_link_setting()