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Searched refs:tl (Results 1 – 25 of 41) sorted by relevance

12

/openbmc/qemu/target/mips/
H A Dhelper.h6 DEF_HELPER_4(sdl, void, env, tl, tl, int)
7 DEF_HELPER_4(sdr, void, env, tl, tl, int)
9 DEF_HELPER_4(swl, void, env, tl, tl, int)
10 DEF_HELPER_4(swr, void, env, tl, tl, int)
13 DEF_HELPER_3(ll, tl, env, tl, int)
15 DEF_HELPER_3(lld, tl, env, tl, int)
19 DEF_HELPER_FLAGS_1(bitswap, TCG_CALL_NO_RWG_SE, tl, tl)
21 DEF_HELPER_FLAGS_1(dbitswap, TCG_CALL_NO_RWG_SE, tl, tl)
24 DEF_HELPER_3(crc32, tl, tl, tl, i32)
25 DEF_HELPER_3(crc32c, tl, tl, tl, i32)
[all …]
/openbmc/qemu/target/mips/tcg/
H A Dsystem_helper.h.inc13 DEF_HELPER_1(mfc0_mvpcontrol, tl, env)
14 DEF_HELPER_1(mfc0_mvpconf0, tl, env)
15 DEF_HELPER_1(mfc0_mvpconf1, tl, env)
16 DEF_HELPER_1(mftc0_vpecontrol, tl, env)
17 DEF_HELPER_1(mftc0_vpeconf0, tl, env)
18 DEF_HELPER_1(mfc0_random, tl, env)
19 DEF_HELPER_1(mfc0_tcstatus, tl, env)
20 DEF_HELPER_1(mftc0_tcstatus, tl, env)
21 DEF_HELPER_1(mfc0_tcbind, tl, env)
22 DEF_HELPER_1(mftc0_tcbind, tl, env)
[all …]
H A Dvr54xx_helper.h.inc11 DEF_HELPER_3(muls, tl, env, tl, tl)
12 DEF_HELPER_3(mulsu, tl, env, tl, tl)
13 DEF_HELPER_3(macc, tl, env, tl, tl)
14 DEF_HELPER_3(maccu, tl, env, tl, tl)
15 DEF_HELPER_3(msac, tl, env, tl, tl)
16 DEF_HELPER_3(msacu, tl, env, tl, tl)
17 DEF_HELPER_3(mulhi, tl, env, tl, tl)
18 DEF_HELPER_3(mulhiu, tl, env, tl, tl)
19 DEF_HELPER_3(mulshi, tl, env, tl, tl)
20 DEF_HELPER_3(mulshiu, tl, env, tl, tl)
[all …]
/openbmc/qemu/target/i386/
H A Dhelper.h1 DEF_HELPER_FLAGS_4(cc_compute_all, TCG_CALL_NO_RWG_SE, tl, tl, tl, tl, int)
2 DEF_HELPER_FLAGS_4(cc_compute_c, TCG_CALL_NO_RWG_SE, tl, tl, tl, tl, int)
3 DEF_HELPER_FLAGS_3(cc_compute_nz, TCG_CALL_NO_RWG_SE, tl, tl, tl, int)
5 DEF_HELPER_3(write_eflags, void, env, tl, i32)
6 DEF_HELPER_1(read_eflags, tl, env)
7 DEF_HELPER_2(divb_AL, void, env, tl)
8 DEF_HELPER_2(idivb_AL, void, env, tl)
9 DEF_HELPER_2(divw_AX, void, env, tl)
10 DEF_HELPER_2(idivw_AX, void, env, tl)
11 DEF_HELPER_2(divl_EAX, void, env, tl)
[all …]
/openbmc/qemu/target/riscv/
H A Dhelper.h32 DEF_HELPER_FLAGS_3(fle_s, TCG_CALL_NO_RWG, tl, env, i64, i64)
33 DEF_HELPER_FLAGS_3(fleq_s, TCG_CALL_NO_RWG, tl, env, i64, i64)
34 DEF_HELPER_FLAGS_3(flt_s, TCG_CALL_NO_RWG, tl, env, i64, i64)
35 DEF_HELPER_FLAGS_3(fltq_s, TCG_CALL_NO_RWG, tl, env, i64, i64)
36 DEF_HELPER_FLAGS_3(feq_s, TCG_CALL_NO_RWG, tl, env, i64, i64)
37 DEF_HELPER_FLAGS_2(fcvt_w_s, TCG_CALL_NO_RWG, tl, env, i64)
38 DEF_HELPER_FLAGS_2(fcvt_wu_s, TCG_CALL_NO_RWG, tl, env, i64)
39 DEF_HELPER_FLAGS_2(fcvt_l_s, TCG_CALL_NO_RWG, tl, env, i64)
40 DEF_HELPER_FLAGS_2(fcvt_lu_s, TCG_CALL_NO_RWG, tl, env, i64)
41 DEF_HELPER_FLAGS_2(fcvt_s_w, TCG_CALL_NO_RWG, i64, env, tl)
[all …]
/openbmc/qemu/target/hppa/
H A Dhelper.h3 DEF_HELPER_FLAGS_3(stby_b, TCG_CALL_NO_WG, void, env, tl, tl)
4 DEF_HELPER_FLAGS_3(stby_b_parallel, TCG_CALL_NO_WG, void, env, tl, tl)
5 DEF_HELPER_FLAGS_3(stby_e, TCG_CALL_NO_WG, void, env, tl, tl)
6 DEF_HELPER_FLAGS_3(stby_e_parallel, TCG_CALL_NO_WG, void, env, tl, tl)
8 DEF_HELPER_FLAGS_3(stdby_b, TCG_CALL_NO_WG, void, env, tl, tl)
9 DEF_HELPER_FLAGS_3(stdby_b_parallel, TCG_CALL_NO_WG, void, env, tl, tl)
10 DEF_HELPER_FLAGS_3(stdby_e, TCG_CALL_NO_WG, void, env, tl, tl)
11 DEF_HELPER_FLAGS_3(stdby_e_parallel, TCG_CALL_NO_WG, void, env, tl, tl)
13 DEF_HELPER_FLAGS_1(ldc_check, TCG_CALL_NO_RWG, void, tl)
23 DEF_HELPER_FLAGS_4(probe, TCG_CALL_NO_WG, tl, env, tl, i32, i32)
[all …]
/openbmc/qemu/target/ppc/
H A Dhelper.h3 DEF_HELPER_FLAGS_4(TW, TCG_CALL_NO_WG, void, env, tl, tl, i32)
5 DEF_HELPER_FLAGS_4(TD, TCG_CALL_NO_WG, void, env, tl, tl, i32)
7 DEF_HELPER_4(HASHST, void, env, tl, tl, tl)
8 DEF_HELPER_4(HASHCHK, void, env, tl, tl, tl)
9 DEF_HELPER_4(HASHSTP, void, env, tl, tl, tl)
10 DEF_HELPER_4(HASHCHKP, void, env, tl, tl, tl)
12 DEF_HELPER_2(store_msr, void, env, tl)
25 DEF_HELPER_2(rfebb, void, env, tl)
26 DEF_HELPER_2(store_lpcr, void, env, tl)
27 DEF_HELPER_2(store_pcr, void, env, tl)
[all …]
/openbmc/qemu/target/arm/tcg/
H A Dhelper-sve.h1658 DEF_HELPER_FLAGS_4(sve_ld1bb_r, TCG_CALL_NO_WG, void, env, ptr, tl, i64)
1659 DEF_HELPER_FLAGS_4(sve_ld2bb_r, TCG_CALL_NO_WG, void, env, ptr, tl, i64)
1660 DEF_HELPER_FLAGS_4(sve_ld3bb_r, TCG_CALL_NO_WG, void, env, ptr, tl, i64)
1661 DEF_HELPER_FLAGS_4(sve_ld4bb_r, TCG_CALL_NO_WG, void, env, ptr, tl, i64)
1663 DEF_HELPER_FLAGS_4(sve_ld1hh_le_r, TCG_CALL_NO_WG, void, env, ptr, tl, i64)
1664 DEF_HELPER_FLAGS_4(sve_ld2hh_le_r, TCG_CALL_NO_WG, void, env, ptr, tl, i64)
1665 DEF_HELPER_FLAGS_4(sve_ld3hh_le_r, TCG_CALL_NO_WG, void, env, ptr, tl, i64)
1666 DEF_HELPER_FLAGS_4(sve_ld4hh_le_r, TCG_CALL_NO_WG, void, env, ptr, tl, i64)
1668 DEF_HELPER_FLAGS_4(sve_ld1hh_be_r, TCG_CALL_NO_WG, void, env, ptr, tl, i64)
1669 DEF_HELPER_FLAGS_4(sve_ld2hh_be_r, TCG_CALL_NO_WG, void, env, ptr, tl, i64)
[all …]
H A Dhelper-sme.h51 DEF_HELPER_FLAGS_5(sme_ld1b_h, TCG_CALL_NO_WG, void, env, ptr, ptr, tl, i64)
52 DEF_HELPER_FLAGS_5(sme_ld1b_v, TCG_CALL_NO_WG, void, env, ptr, ptr, tl, i64)
53 DEF_HELPER_FLAGS_5(sme_ld1b_h_mte, TCG_CALL_NO_WG, void, env, ptr, ptr, tl, i64)
54 DEF_HELPER_FLAGS_5(sme_ld1b_v_mte, TCG_CALL_NO_WG, void, env, ptr, ptr, tl, i64)
56 DEF_HELPER_FLAGS_5(sme_ld1h_be_h, TCG_CALL_NO_WG, void, env, ptr, ptr, tl, i64)
57 DEF_HELPER_FLAGS_5(sme_ld1h_le_h, TCG_CALL_NO_WG, void, env, ptr, ptr, tl, i64)
58 DEF_HELPER_FLAGS_5(sme_ld1h_be_v, TCG_CALL_NO_WG, void, env, ptr, ptr, tl, i64)
59 DEF_HELPER_FLAGS_5(sme_ld1h_le_v, TCG_CALL_NO_WG, void, env, ptr, ptr, tl, i64)
60 DEF_HELPER_FLAGS_5(sme_ld1h_be_h_mte, TCG_CALL_NO_WG, void, env, ptr, ptr, tl, i64)
61 DEF_HELPER_FLAGS_5(sme_ld1h_le_h_mte, TCG_CALL_NO_WG, void, env, ptr, ptr, tl, i64)
[all …]
/openbmc/qemu/target/sparc/
H A Dhelper.h3 DEF_HELPER_2(wrpsr, void, env, tl)
4 DEF_HELPER_1(rdpsr, tl, env)
5 DEF_HELPER_1(rdasr17, tl, env)
8 DEF_HELPER_FLAGS_2(wrpil, TCG_CALL_NO_RWG, void, env, tl)
9 DEF_HELPER_2(wrgl, void, env, tl)
10 DEF_HELPER_2(wrpstate, void, env, tl)
16 DEF_HELPER_1(rdccr, tl, env)
17 DEF_HELPER_2(wrccr, void, env, tl)
18 DEF_HELPER_1(rdcwp, tl, env)
19 DEF_HELPER_2(wrcwp, void, env, tl)
[all …]
H A Dtrace-events4 …ress, uint64_t context, int mmu_idx, uint32_t tl) "DFAULT at 0x%"PRIx64" context 0x%"PRIx64" mmu_i…
5 …dress, uint64_t context, int mmu_idx, uint32_t tl) "DPROT at 0x%"PRIx64" context 0x%"PRIx64" mmu_i…
9 …helper_get_phys_addr_code(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, u…
10 …helper_get_phys_addr_data(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, u…
11 …, int mmu_idx, uint32_t tl, uint64_t prim_context, uint64_t sec_context) "Translate at 0x%"PRIx64"…
22 sparc64_cpu_check_irqs_noset_irq(uint32_t tl, uint32_t tt, int intno) "Not setting CPU IRQ: TL=%d c…
31 win_helper_done(uint32_t tl) "tl=%d"
32 win_helper_retry(uint32_t tl) "tl=%d"
H A Dint64_helper.c109 if (unlikely(env->tl > 0 && cpu_tsptr(env)->tt > new_interrupt in cpu_check_irqs()
111 trace_sparc64_cpu_check_irqs_noset_irq(env->tl, in cpu_check_irqs()
178 if (env->tl >= env->maxtl) { in sparc_cpu_do_interrupt()
180 " Error state", cs->exception_index, env->tl, env->maxtl); in sparc_cpu_do_interrupt()
184 if (env->tl < env->maxtl - 1) { in sparc_cpu_do_interrupt()
185 env->tl++; in sparc_cpu_do_interrupt()
188 if (env->tl < env->maxtl) { in sparc_cpu_do_interrupt()
189 env->tl++; in sparc_cpu_do_interrupt()
200 env->htstate[env->tl] = env->hpstate; in sparc_cpu_do_interrupt()
203 if (env->tl > 2) { in sparc_cpu_do_interrupt()
[all …]
H A Dwin_helper.c433 env->hpstate = env->htstate[env->tl]; in helper_done()
437 env->tl--; in helper_done()
439 trace_win_helper_done(env->tl); in helper_done()
462 env->hpstate = env->htstate[env->tl]; in helper_retry()
466 env->tl--; in helper_retry()
468 trace_win_helper_retry(env->tl); in helper_retry()
H A Dmmu_helper.c594 trace_mmu_helper_dfault(address, context, mmu_idx, env->tl); in get_physical_address_data()
615 trace_mmu_helper_dprot(address, context, mmu_idx, env->tl); in get_physical_address_data()
672 if (env->tl == 0) { in get_physical_address_code()
696 if (env->tl > 0) { in get_physical_address_code()
733 if (env->tl > 0 && mmu_idx != MMU_NUCLEUS_IDX) { in get_physical_address()
735 trace_mmu_helper_get_phys_addr_code(env->tl, mmu_idx, in get_physical_address()
740 trace_mmu_helper_get_phys_addr_data(env->tl, mmu_idx, in get_physical_address()
773 trace_mmu_helper_mmu_fault(address, full.phys_addr, mmu_idx, env->tl, in sparc_cpu_tlb_fill()
/openbmc/qemu/target/openrisc/
H A Dhelper.h50 DEF_HELPER_FLAGS_3(float_ ## op ## _s, TCG_CALL_NO_RWG, tl, env, i32, i32) \
51 DEF_HELPER_FLAGS_3(float_ ## op ## _d, TCG_CALL_NO_RWG, tl, env, i64, i64)
65 DEF_HELPER_FLAGS_3(mtspr, 0, void, env, tl, tl)
66 DEF_HELPER_FLAGS_3(mfspr, TCG_CALL_NO_WG, tl, env, tl, tl)
/openbmc/qemu/tests/tcg/ppc64/
H A Dnon_signalling_xscv.c8 uint64_t th, tl, bh = B_HI, bl = B_LO; \
16 : "=r" (th), "=r" (tl) \
20 "%016" PRIx64 "\n", bh, bl, th, tl); \
21 assert(th == T_HI && tl == T_LO); \
H A Dbcdsub.c29 uint64_t th, tl; \
46 : "=r" (cr), "=r" (th), "=r" (tl) \
50 assert(tl == TL); \
/openbmc/qemu/util/
H A Dqemu-timer.c129 assert(main_loop_tlg.tl[type] == NULL); in qemu_clock_init()
134 main_loop_tlg.tl[type] = timerlist_new(type, notify_cb, NULL); in qemu_clock_init()
161 QEMUTimerList *tl; in qemu_clock_enable() local
167 QLIST_FOREACH(tl, &clock->timerlists, list) { in qemu_clock_enable()
168 qemu_event_wait(&tl->timers_done_ev); in qemu_clock_enable()
181 main_loop_tlg.tl[type]); in qemu_clock_has_timers()
205 main_loop_tlg.tl[type]); in qemu_clock_expired()
358 ts->timer_list = timer_list_group->tl[type]; in timer_init_full()
577 return timerlist_run_timers(main_loop_tlg.tl[type]); in qemu_clock_run_timers()
585 tlg->tl[type] = timerlist_new(type, cb, opaque); in timerlistgroup_init()
[all …]
/openbmc/u-boot/drivers/spi/
H A Dmxs_spi.c195 int tl; in mxs_spi_xfer_dma() local
253 tl = 0x10000; in mxs_spi_xfer_dma()
255 tl = min(length, xfer_max_sz); in mxs_spi_xfer_dma()
258 ((tl & 0xffff) << MXS_DMA_DESC_BYTES_OFFSET) | in mxs_spi_xfer_dma()
263 data += tl; in mxs_spi_xfer_dma()
264 length -= tl; in mxs_spi_xfer_dma()
287 dp->cmd.pio_words[3] = tl; in mxs_spi_xfer_dma()
/openbmc/qemu/target/loongarch/tcg/
H A Dhelper.h8 DEF_HELPER_FLAGS_1(bitrev_w, TCG_CALL_NO_RWG_SE, tl, tl)
9 DEF_HELPER_FLAGS_1(bitrev_d, TCG_CALL_NO_RWG_SE, tl, tl)
10 DEF_HELPER_FLAGS_1(bitswap, TCG_CALL_NO_RWG_SE, tl, tl)
12 DEF_HELPER_FLAGS_3(asrtle_d, TCG_CALL_NO_WG, void, env, tl, tl)
13 DEF_HELPER_FLAGS_3(asrtgt_d, TCG_CALL_NO_WG, void, env, tl, tl)
15 DEF_HELPER_FLAGS_3(crc32, TCG_CALL_NO_RWG_SE, tl, tl, tl, tl)
16 DEF_HELPER_FLAGS_3(crc32c, TCG_CALL_NO_RWG_SE, tl, tl, tl, tl)
17 DEF_HELPER_FLAGS_2(cpucfg, TCG_CALL_NO_RWG_SE, tl, env, tl)
103 DEF_HELPER_2(csrwr_stlbps, i64, env, tl)
104 DEF_HELPER_2(csrwr_estat, i64, env, tl)
[all …]
/openbmc/qemu/host/include/aarch64/host/
H A Dstore-insert-al16.h.inc27 uint64_t tl, th, vl, vh, ml, mh;
43 : [mem] "+Q"(*ps), [f] "=&r"(fail), [l] "=&r"(tl), [h] "=&r"(th)
/openbmc/qemu/tests/unit/
H A Dptimer-test-stubs.c45 ts->timer_list = timer_list_group->tl[type]; in timer_init_full()
93 QEMUTimerList *timer_list = main_loop_tlg.tl[QEMU_CLOCK_VIRTUAL]; in qemu_clock_deadline_ns_all()
/openbmc/qemu/target/i386/tcg/
H A Dops_sse_header.h.inc81 DEF_HELPER_4(glue(maskmov, SUFFIX), void, env, Reg, Reg, tl)
340 DEF_HELPER_3(crc32, tl, i32, tl, i32)
387 DEF_HELPER_4(glue(vpmaskmovd_st, SUFFIX), void, env, Reg, Reg, tl)
388 DEF_HELPER_4(glue(vpmaskmovq_st, SUFFIX), void, env, Reg, Reg, tl)
391 DEF_HELPER_6(glue(vpgatherdd, SUFFIX), void, env, Reg, Reg, Reg, tl, i32)
392 DEF_HELPER_6(glue(vpgatherdq, SUFFIX), void, env, Reg, Reg, Reg, tl, i32)
393 DEF_HELPER_6(glue(vpgatherqd, SUFFIX), void, env, Reg, Reg, Reg, tl, i32)
394 DEF_HELPER_6(glue(vpgatherqq, SUFFIX), void, env, Reg, Reg, Reg, tl, i32)
/openbmc/qemu/target/s390x/tcg/
H A Dtranslate_vx.c.inc1351 TCGv_i64 tl = tcg_temp_new_i64();
1354 tcg_gen_add2_i64(tl, th, al, zero, bl, zero);
1355 tcg_gen_add2_i64(tl, th, th, zero, ah, zero);
1356 tcg_gen_add2_i64(tl, dl, tl, th, bh, zero);
1386 TCGv_i64 tl = tcg_temp_new_i64();
1390 tcg_gen_extract_i64(tl, cl, 0, 1);
1392 tcg_gen_add2_i64(dl, dh, dl, dh, tl, zero);
1411 TCGv_i64 tl = tcg_temp_new_i64();
1415 tcg_gen_andi_i64(tl, cl, 1);
1416 tcg_gen_add2_i64(tl, th, tl, zero, al, zero);
[all …]
/openbmc/qemu/target/microblaze/
H A Dhelper.h23 DEF_HELPER_FLAGS_2(stackprot, TCG_CALL_NO_WG, void, env, tl)

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