1*d0fb9657SStefano Garzarella# See docs/devel/tracing.rst for syntax documentation. 2fcf5ef2aSThomas Huth 3500016e5SMarkus Armbruster# mmu_helper.c 48908eb1aSVladimir Sementsov-Ogievskiymmu_helper_dfault(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DFAULT at 0x%"PRIx64" context 0x%"PRIx64" mmu_idx=%d tl=%d" 58908eb1aSVladimir Sementsov-Ogievskiymmu_helper_dprot(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DPROT at 0x%"PRIx64" context 0x%"PRIx64" mmu_idx=%d tl=%d" 68908eb1aSVladimir Sementsov-Ogievskiymmu_helper_dmiss(uint64_t address, uint64_t context) "DMISS at 0x%"PRIx64" context 0x%"PRIx64 78908eb1aSVladimir Sementsov-Ogievskiymmu_helper_tfault(uint64_t address, uint64_t context) "TFAULT at 0x%"PRIx64" context 0x%"PRIx64 88908eb1aSVladimir Sementsov-Ogievskiymmu_helper_tmiss(uint64_t address, uint64_t context) "TMISS at 0x%"PRIx64" context 0x%"PRIx64 98908eb1aSVladimir Sementsov-Ogievskiymmu_helper_get_phys_addr_code(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=0x%"PRIx64" secondary context=0x%"PRIx64" address=0x%"PRIx64 108908eb1aSVladimir Sementsov-Ogievskiymmu_helper_get_phys_addr_data(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=0x%"PRIx64" secondary context=0x%"PRIx64" address=0x%"PRIx64 118908eb1aSVladimir Sementsov-Ogievskiymmu_helper_mmu_fault(uint64_t address, uint64_t paddr, int mmu_idx, uint32_t tl, uint64_t prim_context, uint64_t sec_context) "Translate at 0x%"PRIx64" -> 0x%"PRIx64", mmu_idx=%d tl=%d primary context=0x%"PRIx64" secondary context=0x%"PRIx64 12fcf5ef2aSThomas Huth 1310fb1340SPhilippe Mathieu-Daudé# int32_helper.c 1410fb1340SPhilippe Mathieu-Daudésun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d" 1510fb1340SPhilippe Mathieu-Daudésun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d" 1610fb1340SPhilippe Mathieu-Daudé 17500016e5SMarkus Armbruster# int64_helper.c 188908eb1aSVladimir Sementsov-Ogievskiyint_helper_set_softint(uint32_t softint) "new 0x%08x" 198908eb1aSVladimir Sementsov-Ogievskiyint_helper_clear_softint(uint32_t softint) "new 0x%08x" 208908eb1aSVladimir Sementsov-Ogievskiyint_helper_write_softint(uint32_t softint) "new 0x%08x" 2110fb1340SPhilippe Mathieu-Daudésparc64_cpu_check_irqs_reset_irq(int intno) "Reset CPU IRQ (current interrupt 0x%x)" 2210fb1340SPhilippe Mathieu-Daudésparc64_cpu_check_irqs_noset_irq(uint32_t tl, uint32_t tt, int intno) "Not setting CPU IRQ: TL=%d current 0x%x >= pending 0x%x" 2310fb1340SPhilippe Mathieu-Daudésparc64_cpu_check_irqs_set_irq(unsigned int i, int old, int new) "Set CPU IRQ %d old=0x%x new=0x%x" 2410fb1340SPhilippe Mathieu-Daudésparc64_cpu_check_irqs_disabled(uint32_t pil, uint32_t pil_in, uint32_t softint, int intno) "Interrupts disabled, pil=0x%08x pil_in=0x%08x softint=0x%08x current interrupt 0x%x" 25fcf5ef2aSThomas Huth 26500016e5SMarkus Armbruster# win_helper.c 278908eb1aSVladimir Sementsov-Ogievskiywin_helper_gregset_error(uint32_t pstate) "ERROR in get_gregset: active pstate bits=0x%x" 288908eb1aSVladimir Sementsov-Ogievskiywin_helper_switch_pstate(uint32_t pstate_regs, uint32_t new_pstate_regs) "change_pstate: switching regs old=0x%x new=0x%x" 298908eb1aSVladimir Sementsov-Ogievskiywin_helper_no_switch_pstate(uint32_t new_pstate_regs) "change_pstate: regs new=0x%x (unchanged)" 308908eb1aSVladimir Sementsov-Ogievskiywin_helper_wrpil(uint32_t psrpil, uint32_t new_pil) "old=0x%x new=0x%x" 31fcf5ef2aSThomas Huthwin_helper_done(uint32_t tl) "tl=%d" 32fcf5ef2aSThomas Huthwin_helper_retry(uint32_t tl) "tl=%d" 33