| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn201/ |
| H A D | dcn201_resource.c | 759 struct optc *tgn10 = in dcn201_timing_generator_create() local
762 if (!tgn10) in dcn201_timing_generator_create()
765 tgn10->base.inst = instance; in dcn201_timing_generator_create()
766 tgn10->base.ctx = ctx; in dcn201_timing_generator_create()
768 tgn10->tg_regs = &tg_regs[instance]; in dcn201_timing_generator_create()
769 tgn10->tg_shift = &tg_shift; in dcn201_timing_generator_create()
770 tgn10->tg_mask = &tg_mask; in dcn201_timing_generator_create()
772 dcn201_timing_generator_init(tgn10); in dcn201_timing_generator_create()
774 return &tgn10->base; in dcn201_timing_generator_create()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn302/ |
| H A D | dcn302_resource.c | 603 struct optc *tgn10 = kzalloc(sizeof(struct optc), GFP_KERNEL); in dcn302_timing_generator_create() local
605 if (!tgn10) in dcn302_timing_generator_create()
608 tgn10->base.inst = instance; in dcn302_timing_generator_create()
609 tgn10->base.ctx = ctx; in dcn302_timing_generator_create()
611 tgn10->tg_regs = &optc_regs[instance]; in dcn302_timing_generator_create()
612 tgn10->tg_shift = &optc_shift; in dcn302_timing_generator_create()
613 tgn10->tg_mask = &optc_mask; in dcn302_timing_generator_create()
615 dcn30_timing_generator_init(tgn10); in dcn302_timing_generator_create()
617 return &tgn10->base; in dcn302_timing_generator_create()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn303/ |
| H A D | dcn303_resource.c | 557 struct optc *tgn10 = kzalloc(sizeof(struct optc), GFP_KERNEL); in dcn303_timing_generator_create() local
559 if (!tgn10) in dcn303_timing_generator_create()
562 tgn10->base.inst = instance; in dcn303_timing_generator_create()
563 tgn10->base.ctx = ctx; in dcn303_timing_generator_create()
565 tgn10->tg_regs = &optc_regs[instance]; in dcn303_timing_generator_create()
566 tgn10->tg_shift = &optc_shift; in dcn303_timing_generator_create()
567 tgn10->tg_mask = &optc_mask; in dcn303_timing_generator_create()
569 dcn30_timing_generator_init(tgn10); in dcn303_timing_generator_create()
571 return &tgn10->base; in dcn303_timing_generator_create()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_resource.c | 712 struct optc *tgn10 = in dcn10_timing_generator_create() local
715 if (!tgn10) in dcn10_timing_generator_create()
718 tgn10->base.inst = instance; in dcn10_timing_generator_create()
719 tgn10->base.ctx = ctx; in dcn10_timing_generator_create()
721 tgn10->tg_regs = &tg_regs[instance]; in dcn10_timing_generator_create()
722 tgn10->tg_shift = &tg_shift; in dcn10_timing_generator_create()
723 tgn10->tg_mask = &tg_mask; in dcn10_timing_generator_create()
725 dcn10_timing_generator_init(tgn10); in dcn10_timing_generator_create()
727 return &tgn10->base; in dcn10_timing_generator_create()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn301/ |
| H A D | dcn301_resource.c | 845 struct optc *tgn10 = in dcn301_timing_generator_create() local
848 if (!tgn10) in dcn301_timing_generator_create()
851 tgn10->base.inst = instance; in dcn301_timing_generator_create()
852 tgn10->base.ctx = ctx; in dcn301_timing_generator_create()
854 tgn10->tg_regs = &optc_regs[instance]; in dcn301_timing_generator_create()
855 tgn10->tg_shift = &optc_shift; in dcn301_timing_generator_create()
856 tgn10->tg_mask = &optc_mask; in dcn301_timing_generator_create()
858 dcn301_timing_generator_init(tgn10); in dcn301_timing_generator_create()
860 return &tgn10->base; in dcn301_timing_generator_create()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn21/ |
| H A D | dcn21_resource.c | 1063 struct optc *tgn10 = in dcn21_timing_generator_create() local
1066 if (!tgn10) in dcn21_timing_generator_create()
1069 tgn10->base.inst = instance; in dcn21_timing_generator_create()
1070 tgn10->base.ctx = ctx; in dcn21_timing_generator_create()
1072 tgn10->tg_regs = &tg_regs[instance]; in dcn21_timing_generator_create()
1073 tgn10->tg_shift = &tg_shift; in dcn21_timing_generator_create()
1074 tgn10->tg_mask = &tg_mask; in dcn21_timing_generator_create()
1076 dcn20_timing_generator_init(tgn10); in dcn21_timing_generator_create()
1078 return &tgn10->base; in dcn21_timing_generator_create()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn316/ |
| H A D | dcn316_resource.c | 1051 struct optc *tgn10 = in dcn31_timing_generator_create() local
1054 if (!tgn10) in dcn31_timing_generator_create()
1057 tgn10->base.inst = instance; in dcn31_timing_generator_create()
1058 tgn10->base.ctx = ctx; in dcn31_timing_generator_create()
1060 tgn10->tg_regs = &optc_regs[instance]; in dcn31_timing_generator_create()
1061 tgn10->tg_shift = &optc_shift; in dcn31_timing_generator_create()
1062 tgn10->tg_mask = &optc_mask; in dcn31_timing_generator_create()
1064 dcn31_timing_generator_init(tgn10); in dcn31_timing_generator_create()
1066 return &tgn10->base; in dcn31_timing_generator_create()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn315/ |
| H A D | dcn315_resource.c | 1055 struct optc *tgn10 = in dcn31_timing_generator_create() local
1058 if (!tgn10) in dcn31_timing_generator_create()
1061 tgn10->base.inst = instance; in dcn31_timing_generator_create()
1062 tgn10->base.ctx = ctx; in dcn31_timing_generator_create()
1064 tgn10->tg_regs = &optc_regs[instance]; in dcn31_timing_generator_create()
1065 tgn10->tg_shift = &optc_shift; in dcn31_timing_generator_create()
1066 tgn10->tg_mask = &optc_mask; in dcn31_timing_generator_create()
1068 dcn31_timing_generator_init(tgn10); in dcn31_timing_generator_create()
1070 return &tgn10->base; in dcn31_timing_generator_create()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn321/ |
| H A D | dcn321_resource.c | 991 struct optc *tgn10 = in dcn321_timing_generator_create() local
994 if (!tgn10) in dcn321_timing_generator_create()
1004 tgn10->base.inst = instance; in dcn321_timing_generator_create()
1005 tgn10->base.ctx = ctx; in dcn321_timing_generator_create()
1007 tgn10->tg_regs = &optc_regs[instance]; in dcn321_timing_generator_create()
1008 tgn10->tg_shift = &optc_shift; in dcn321_timing_generator_create()
1009 tgn10->tg_mask = &optc_mask; in dcn321_timing_generator_create()
1011 dcn32_timing_generator_init(tgn10); in dcn321_timing_generator_create()
1013 return &tgn10->base; in dcn321_timing_generator_create()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/ |
| H A D | dcn314_resource.c | 1129 struct optc *tgn10 = in dcn31_timing_generator_create() local
1132 if (!tgn10) in dcn31_timing_generator_create()
1135 tgn10->base.inst = instance; in dcn31_timing_generator_create()
1136 tgn10->base.ctx = ctx; in dcn31_timing_generator_create()
1138 tgn10->tg_regs = &optc_regs[instance]; in dcn31_timing_generator_create()
1139 tgn10->tg_shift = &optc_shift; in dcn31_timing_generator_create()
1140 tgn10->tg_mask = &optc_mask; in dcn31_timing_generator_create()
1142 dcn314_timing_generator_init(tgn10); in dcn31_timing_generator_create()
1144 return &tgn10->base; in dcn31_timing_generator_create()
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
| H A D | dcn31_resource.c | 1057 struct optc *tgn10 = in dcn31_timing_generator_create() local
1060 if (!tgn10) in dcn31_timing_generator_create()
1063 tgn10->base.inst = instance; in dcn31_timing_generator_create()
1064 tgn10->base.ctx = ctx; in dcn31_timing_generator_create()
1066 tgn10->tg_regs = &optc_regs[instance]; in dcn31_timing_generator_create()
1067 tgn10->tg_shift = &optc_shift; in dcn31_timing_generator_create()
1068 tgn10->tg_mask = &optc_mask; in dcn31_timing_generator_create()
1070 dcn31_timing_generator_init(tgn10); in dcn31_timing_generator_create()
1072 return &tgn10->base; in dcn31_timing_generator_create()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_resource.c | 890 struct optc *tgn10 = in dcn30_timing_generator_create() local
893 if (!tgn10) in dcn30_timing_generator_create()
896 tgn10->base.inst = instance; in dcn30_timing_generator_create()
897 tgn10->base.ctx = ctx; in dcn30_timing_generator_create()
899 tgn10->tg_regs = &optc_regs[instance]; in dcn30_timing_generator_create()
900 tgn10->tg_shift = &optc_shift; in dcn30_timing_generator_create()
901 tgn10->tg_mask = &optc_mask; in dcn30_timing_generator_create()
903 dcn30_timing_generator_init(tgn10); in dcn30_timing_generator_create()
905 return &tgn10->base; in dcn30_timing_generator_create()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/ |
| H A D | dcn32_resource.c | 992 struct optc *tgn10 = in dcn32_timing_generator_create() local
995 if (!tgn10) in dcn32_timing_generator_create()
1005 tgn10->base.inst = instance; in dcn32_timing_generator_create()
1006 tgn10->base.ctx = ctx; in dcn32_timing_generator_create()
1008 tgn10->tg_regs = &optc_regs[instance]; in dcn32_timing_generator_create()
1009 tgn10->tg_shift = &optc_shift; in dcn32_timing_generator_create()
1010 tgn10->tg_mask = &optc_mask; in dcn32_timing_generator_create()
1012 dcn32_timing_generator_init(tgn10); in dcn32_timing_generator_create()
1014 return &tgn10->base; in dcn32_timing_generator_create()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_resource.c | 887 struct optc *tgn10 = in dcn20_timing_generator_create() local
890 if (!tgn10) in dcn20_timing_generator_create()
893 tgn10->base.inst = instance; in dcn20_timing_generator_create()
894 tgn10->base.ctx = ctx; in dcn20_timing_generator_create()
896 tgn10->tg_regs = &tg_regs[instance]; in dcn20_timing_generator_create()
897 tgn10->tg_shift = &tg_shift; in dcn20_timing_generator_create()
898 tgn10->tg_mask = &tg_mask; in dcn20_timing_generator_create()
900 dcn20_timing_generator_init(tgn10); in dcn20_timing_generator_create()
902 return &tgn10->base; in dcn20_timing_generator_create()
|