Searched refs:tegra_pll_info_table (Results 1 – 10 of 10) sorted by relevance
93 struct clk_pll_info *pllinfo = &tegra_pll_info_table[clkid]; in clock_ll_read_pll()117 struct clk_pll_info *pllinfo = &tegra_pll_info_table[clkid]; in clock_start_pll()537 struct clk_pll_info *pllinfo = &tegra_pll_info_table[clkid]; in clock_get_rate()592 struct clk_pll_info *pllinfo = &tegra_pll_info_table[clkid]; in clock_set_rate()
173 struct clk_pll_info *pllinfo = &tegra_pll_info_table[CLOCK_ID_XCPU]; in pllx_set_rate()
430 struct clk_pll_info tegra_pll_info_table[CLOCK_ID_PLL_COUNT] = { variable664 pllinfo = &tegra_pll_info_table[CLOCK_ID_CGENERAL]; in clock_early_init()701 pllinfo = &tegra_pll_info_table[CLOCK_ID_CGENERAL]; in clock_early_init()706 pllinfo = &tegra_pll_info_table[CLOCK_ID_DISPLAY]; in clock_early_init()
54 struct clk_pll_info *pllinfo = &tegra_pll_info_table[CLOCK_ID_XCPU]; in enable_cpu_clocks()
405 extern struct clk_pll_info tegra_pll_info_table[CLOCK_ID_PLL_COUNT];
570 struct clk_pll_info tegra_pll_info_table[CLOCK_ID_PLL_COUNT] = { variable844 pllinfo = &tegra_pll_info_table[CLOCK_ID_CGENERAL]; in clock_early_init()881 pllinfo = &tegra_pll_info_table[CLOCK_ID_CGENERAL]; in clock_early_init()886 pllinfo = &tegra_pll_info_table[CLOCK_ID_DISPLAY]; in clock_early_init()
47 struct clk_pll_info *pllinfo = &tegra_pll_info_table[CLOCK_ID_XCPU]; in enable_cpu_clocks()
641 struct clk_pll_info tegra_pll_info_table[CLOCK_ID_PLL_COUNT] = { variable973 struct clk_pll_info *pllinfo = &tegra_pll_info_table[CLOCK_ID_DISPLAY]; in clock_early_init()
361 struct clk_pll_info tegra_pll_info_table[CLOCK_ID_PLL_COUNT] = { variable
410 struct clk_pll_info tegra_pll_info_table[CLOCK_ID_PLL_COUNT] = { variable