| /openbmc/qemu/target/arm/tcg/ |
| H A D | translate-a64.c | 8877 TCGv_i32 tcg_op = read_fp_hreg(s, rn); in handle_fp_1src_half()
8882 tcg_gen_mov_i32(tcg_res, tcg_op); in handle_fp_1src_half()
8885 gen_vfp_absh(tcg_res, tcg_op); in handle_fp_1src_half()
8888 gen_vfp_negh(tcg_res, tcg_op); in handle_fp_1src_half()
8892 gen_helper_sqrt_f16(tcg_res, tcg_op, fpst); in handle_fp_1src_half()
8904 gen_helper_advsimd_rinth(tcg_res, tcg_op, fpst); in handle_fp_1src_half()
8910 gen_helper_advsimd_rinth_exact(tcg_res, tcg_op, fpst); in handle_fp_1src_half()
8914 gen_helper_advsimd_rinth(tcg_res, tcg_op, fpst); in handle_fp_1src_half()
8927 TCGv_i32 tcg_op, tcg_res; in handle_fp_1src_single()
8931 tcg_op in handle_fp_1src_single()
8876 TCGv_i32 tcg_op = read_fp_hreg(s, rn); handle_fp_1src_half() local
8926 TCGv_i32 tcg_op, tcg_res; handle_fp_1src_single() local
8998 TCGv_i64 tcg_op, tcg_res; handle_fp_1src_double() local
9849 TCGv_i64 tcg_op = tcg_temp_new_i64(); handle_simd_shift_fpint_conv() local
9884 TCGv_i32 tcg_op = tcg_temp_new_i32(); handle_simd_shift_fpint_conv() local
10066 TCGv_i64 tcg_op = tcg_temp_new_i64(); handle_2misc_fcmp_zero() local
10105 TCGv_i32 tcg_op = tcg_temp_new_i32(); handle_2misc_fcmp_zero() local
10189 TCGv_i64 tcg_op = tcg_temp_new_i64(); handle_2misc_reciprocal() local
10212 TCGv_i32 tcg_op = tcg_temp_new_i32(); handle_2misc_reciprocal() local
10271 TCGv_i64 tcg_op = tcg_temp_new_i64(); handle_2misc_narrow() local
10622 TCGv_i32 tcg_op = tcg_temp_new_i32(); handle_2misc_widening() local
10754 TCGv_i64 tcg_op = tcg_temp_new_i64(); handle_2misc_pairwise() local
10802 TCGv_i32 tcg_op = tcg_temp_new_i32(); handle_shll() local
11141 TCGv_i64 tcg_op = tcg_temp_new_i64(); disas_simd_two_reg_misc() local
11155 TCGv_i32 tcg_op = tcg_temp_new_i32(); disas_simd_two_reg_misc() local
11449 TCGv_i32 tcg_op = read_fp_hreg(s, rn); disas_simd_two_reg_misc_fp16() local
11488 TCGv_i32 tcg_op = tcg_temp_new_i32(); disas_simd_two_reg_misc_fp16() local
[all...] |
| H A D | translate-vfp.c | 471 TCGv_i64 tcg_op; in trans_VRINT() local
473 tcg_op = tcg_temp_new_i64(); in trans_VRINT()
475 vfp_load_reg64(tcg_op, rm); in trans_VRINT()
476 gen_helper_rintd(tcg_res, tcg_op, fpst); in trans_VRINT()
479 TCGv_i32 tcg_op; in trans_VRINT() local
481 tcg_op = tcg_temp_new_i32(); in trans_VRINT()
483 vfp_load_reg32(tcg_op, rm); in trans_VRINT()
485 gen_helper_rinth(tcg_res, tcg_op, fpst); in trans_VRINT()
487 gen_helper_rints(tcg_res, tcg_op, fpst); in trans_VRINT()
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| /openbmc/qemu/target/ppc/translate/ |
| H A D | spe-impl.c.inc | 58 #define GEN_SPEOP_LOGIC2(name, tcg_op) \
65 tcg_op(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], \
67 tcg_op(cpu_gprh[rD(ctx->opcode)], cpu_gprh[rA(ctx->opcode)], \
105 #define GEN_SPEOP_ARITH1(name, tcg_op) \
116 tcg_op(t0, t0); \
120 tcg_op(t0, t0); \
137 #define GEN_SPEOP_ARITH2(name, tcg_op) \
150 tcg_op(t0, t0, t1); \
155 tcg_op(t0, t0, t1); \
231 #define GEN_SPEOP_ARITH_IMM2(name, tcg_op) \
[all …]
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| H A D | vmx-impl.c.inc | 201 #define GEN_VXFORM_V(name, vece, tcg_op, opc2, opc3) \
209 tcg_op(vece, \
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| /openbmc/qemu/target/ppc/ |
| H A D | translate.c | 3823 #define GEN_CRLOGIC(name, tcg_op, opc) \ argument
3845 tcg_op(t0, t0, t1); \
6041 #define GEN_CRLOGIC(name, tcg_op, opc) \ argument
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