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Searched refs:t_rp (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_bw.c22 u16 dclk, t_rp, t_rdpre, t_rc, t_ras, t_rcd; member
63 sp->t_rp = REG_FIELD_GET(DG1_DRAM_T_RP_MASK, val); in dg1_mchbar_read_qgv_point_info()
70 sp->t_rc = sp->t_rp + sp->t_ras; in dg1_mchbar_read_qgv_point_info()
91 sp->t_rp = (val & 0xff0000) >> 16; in icl_pcode_read_qgv_point_info()
97 sp->t_rc = sp->t_rp + sp->t_ras; in icl_pcode_read_qgv_point_info()
186 sp->t_rp = REG_FIELD_GET(MTL_TRP_MASK, val); in mtl_read_qgv_point_info()
192 sp->t_rc = sp->t_rp + sp->t_ras; in mtl_read_qgv_point_info()
297 i, sp->dclk, sp->t_rp, sp->t_rdpre, sp->t_ras, in icl_get_qgv_points()
429 ct = max_t(int, sp->t_rc, sp->t_rp + sp->t_rcd + in icl_get_bw_info()
531 ct = max_t(int, sp->t_rc, sp->t_rp + sp->t_rcd + in tgl_get_bw_info()
/openbmc/u-boot/arch/arm/mach-keystone/
H A Dddr3_spd.c105 u32 t_rp; member
221 spd->t_rp = (((buf->trp_min * mtb) - 1) / spd->t_ck) + 1; in ddrtimingcalculation()
328 (spd->t_rp & 0xf) << 8 | (spd->t_wtr & 0xf) << 4 | in init_ddr3param()
383 spd_cb->emif_cfg.sdtim2 = 0x07 << 10 | ((spd->t_rp - 1) & 0x1f) << 5 | in init_ddr3param()
/openbmc/u-boot/arch/arm/cpu/arm926ejs/lpc32xx/
H A Ddram.c41 writel((ck / dram->trp) & 0x0000000F, &emc->t_rp); in ddr_init()
/openbmc/u-boot/arch/arm/include/asm/arch-lpc32xx/
H A Demc.h21 u32 t_rp; /* Precharge command period */ member
/openbmc/u-boot/drivers/ddr/marvell/a38x/
H A Dddr3_training.c1623 u32 t_rcd = 0, t_rp = 0, t_wr = 0, t_wtr = 0, t_rrd = 0, t_rtp = 0, in ddr3_tip_set_timing() local
1675 t_rp = time_to_nclk(mv_ddr_speed_bin_timing_get(speed_bin_index, in ddr3_tip_set_timing()
1692 (((t_rp - 1) & SDRAM_TIMING_LOW_TRP_MASK) << SDRAM_TIMING_LOW_TRP_OFFS) | in ddr3_tip_set_timing()
1693 (((t_rp - 1) >> SDRAM_TIMING_LOW_TRP_MASK & SDRAM_TIMING_HIGH_TRP_MASK) in ddr3_tip_set_timing()