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Searched refs:t2 (Results 1 – 25 of 129) sorted by relevance

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/openbmc/u-boot/arch/mips/mach-mt7620/
H A Dlowlevel_init.S74 lw t2, 0(t5)
75 andi t2, t2, 0x1
76 bnez t2, CPLL_READY
89 li t2, ~0x0c
90 and t1, t1, t2
112 lw t2, 0x34(s0)
113 ori t2, BIT(10)
114 sw t2, 0x34(s0)
130 li t2, BIT(31)
131 or t4, t4, t2
[all …]
/openbmc/sdbusplus/test/vtable/
H A Dvtable.cpp34 constexpr bool operator==(const sd_bus_vtable& t1, const sd_bus_vtable& t2) in operator ==() argument
36 if (t1.type != t2.type || t1.flags != t2.flags) in operator ==()
44 return t1.x.start.element_size == t2.x.start.element_size && in operator ==()
45 t1.x.start.features == t2.x.start.features && in operator ==()
47 t2.x.start.vtable_format_reference; in operator ==()
53 memcmp(&t2.x, allZeors, sizeof(t2.x)) == 0; in operator ==()
56 return strcmp(t1.x.method.member, t2.x.method.member) == 0 && in operator ==()
57 strcmp(t1.x.method.signature, t2.x.method.signature) == 0 && in operator ==()
58 strcmp(t1.x.method.result, t2.x.method.result) == 0 && in operator ==()
59 t1.x.method.handler == t2.x.method.handler && in operator ==()
[all …]
/openbmc/qemu/target/mips/tcg/
H A Dmxu_translate.c996 TCGv t0, t1, t2, t3; in gen_mxu_d16mul() local
1001 t2 = tcg_temp_new(); in gen_mxu_d16mul()
1020 tcg_gen_sextract_tl(t2, t3, 0, 16); in gen_mxu_d16mul()
1026 tcg_gen_mul_tl(t2, t0, t2); in gen_mxu_d16mul()
1030 tcg_gen_mul_tl(t2, t0, t2); in gen_mxu_d16mul()
1034 tcg_gen_mul_tl(t2, t1, t2); in gen_mxu_d16mul()
1038 tcg_gen_mul_tl(t2, t1, t2); in gen_mxu_d16mul()
1046 tcg_gen_shli_tl(t2, t2, 1); in gen_mxu_d16mul()
1067 tcg_gen_andi_tl(t0, t2, 0x1ffff); in gen_mxu_d16mul()
1070 tcg_gen_addi_tl(t2, t2, 0x8000); in gen_mxu_d16mul()
[all …]
/openbmc/u-boot/arch/mips/mach-ath79/ar933x/
H A Dlowlevel_init.S87 li t2, 0xfffff7ff
88 and t1, t1, t2
95 li t2, 0x20
97 beqz t2, 1b
99 addi t2, t2, -1
149 li t2, 0xc07fffff
150 and t1, t1, t2
151 li t2, 0x800000
152 or t1, t1, t2
190 li t2, 0x80000000
[all …]
/openbmc/u-boot/board/imgtec/malta/
H A Dlowlevel_init.S111 li t2, MSC01_PBC_CS0CFG_DTYP_MSK
112 and t1, t2
121 li t2, -CONFIG_SYS_MEM_SIZE
123 sw t2, MSC01_BIU_MCMSK1L_OFS(t0)
125 sw t2, MSC01_BIU_MCMSK2L_OFS(t0)
129 li t2, -MALTA_MSC01_IP1_SIZE
131 sw t2, MSC01_BIU_IP1MSK1L_OFS(t0)
133 sw t2, MSC01_BIU_IP1MSK2L_OFS(t0)
137 li t2, -MALTA_MSC01_IP2_SIZE1
139 sw t2, MSC01_BIU_IP2MSK1L_OFS(t0)
[all …]
/openbmc/qemu/include/exec/
H A Dhelper-gen.h.inc31 #define DEF_HELPER_FLAGS_2(name, flags, ret, t1, t2) \
34 dh_arg_decl(t1, 1), dh_arg_decl(t2, 2)) \
38 dh_arg(t1, 1), dh_arg(t2, 2)); \
41 #define DEF_HELPER_FLAGS_3(name, flags, ret, t1, t2, t3) \
44 dh_arg_decl(t1, 1), dh_arg_decl(t2, 2), dh_arg_decl(t3, 3)) \
48 dh_arg(t1, 1), dh_arg(t2, 2), dh_arg(t3, 3)); \
51 #define DEF_HELPER_FLAGS_4(name, flags, ret, t1, t2, t3, t4) \
54 dh_arg_decl(t1, 1), dh_arg_decl(t2, 2), \
59 dh_arg(t1, 1), dh_arg(t2, 2), \
63 #define DEF_HELPER_FLAGS_5(name, flags, ret, t1, t2, t3, t4, t5) \
[all …]
H A Dhelper-proto.h.inc29 #define DEF_HELPER_FLAGS_2(name, flags, ret, t1, t2) \
30 dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2)) DEF_HELPER_ATTR;
32 #define DEF_HELPER_FLAGS_3(name, flags, ret, t1, t2, t3) \
33 dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), \
36 #define DEF_HELPER_FLAGS_4(name, flags, ret, t1, t2, t3, t4) \
37 dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
40 #define DEF_HELPER_FLAGS_5(name, flags, ret, t1, t2, t3, t4, t5) \
41 dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
44 #define DEF_HELPER_FLAGS_6(name, flags, ret, t1, t2, t3, t4, t5, t6) \
45 dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
[all …]
H A Dhelper-head.h.inc134 #define DEF_HELPER_2(name, ret, t1, t2) \
135 DEF_HELPER_FLAGS_2(name, 0, ret, t1, t2)
136 #define DEF_HELPER_3(name, ret, t1, t2, t3) \
137 DEF_HELPER_FLAGS_3(name, 0, ret, t1, t2, t3)
138 #define DEF_HELPER_4(name, ret, t1, t2, t3, t4) \
139 DEF_HELPER_FLAGS_4(name, 0, ret, t1, t2, t3, t4)
140 #define DEF_HELPER_5(name, ret, t1, t2, t3, t4, t5) \
141 DEF_HELPER_FLAGS_5(name, 0, ret, t1, t2, t3, t4, t5)
142 #define DEF_HELPER_6(name, ret, t1, t2, t3, t4, t5, t6) \
143 DEF_HELPER_FLAGS_6(name, 0, ret, t1, t2, t3, t4, t5, t6)
[all …]
/openbmc/qemu/host/include/aarch64/host/
H A Dbufferiszero.c.inc17 uint32x4_t t0, t1, t2, t3;
28 t2 = e[-5] | e[-4];
32 REASSOC_BARRIER(t2, t3);
34 t2 |= t3;
35 REASSOC_BARRIER(t0, t2);
36 t0 |= t2;
54 t2 = p[4] | p[5];
57 REASSOC_BARRIER(t2, t3);
59 t2 |= t3;
60 REASSOC_BARRIER(t0, t2);
[all …]
/openbmc/qemu/crypto/
H A Daes.c1451 u32 s0, s1, s2, s3, t0, t1, t2, t3; in AES_encrypt() local
1471 …t2 = AES_Te0[s2 >> 24] ^ AES_Te1[(s3 >> 16) & 0xff] ^ AES_Te2[(s0 >> 8) & 0xff] ^ AES_Te3[s1 & 0x… in AES_encrypt()
1474 …s0 = AES_Te0[t0 >> 24] ^ AES_Te1[(t1 >> 16) & 0xff] ^ AES_Te2[(t2 >> 8) & 0xff] ^ AES_Te3[t3 & 0x… in AES_encrypt()
1475 …s1 = AES_Te0[t1 >> 24] ^ AES_Te1[(t2 >> 16) & 0xff] ^ AES_Te2[(t3 >> 8) & 0xff] ^ AES_Te3[t0 & 0x… in AES_encrypt()
1476 …s2 = AES_Te0[t2 >> 24] ^ AES_Te1[(t3 >> 16) & 0xff] ^ AES_Te2[(t0 >> 8) & 0xff] ^ AES_Te3[t1 & 0x… in AES_encrypt()
1477 …[t3 >> 24] ^ AES_Te1[(t0 >> 16) & 0xff] ^ AES_Te2[(t1 >> 8) & 0xff] ^ AES_Te3[t2 & 0xff] ^ rk[11]; in AES_encrypt()
1481 …t2 = AES_Te0[s2 >> 24] ^ AES_Te1[(s3 >> 16) & 0xff] ^ AES_Te2[(s0 >> 8) & 0xff] ^ AES_Te3[s1 & 0x… in AES_encrypt()
1484 …s0 = AES_Te0[t0 >> 24] ^ AES_Te1[(t1 >> 16) & 0xff] ^ AES_Te2[(t2 >> 8) & 0xff] ^ AES_Te3[t3 & 0x… in AES_encrypt()
1485 …s1 = AES_Te0[t1 >> 24] ^ AES_Te1[(t2 >> 16) & 0xff] ^ AES_Te2[(t3 >> 8) & 0xff] ^ AES_Te3[t0 & 0x… in AES_encrypt()
1486 …s2 = AES_Te0[t2 >> 24] ^ AES_Te1[(t3 >> 16) & 0xff] ^ AES_Te2[(t0 >> 8) & 0xff] ^ AES_Te3[t1 & 0x… in AES_encrypt()
[all …]
/openbmc/qemu/docs/devel/
H A Dtcg-ops.rst62 add_i32 t0, t1, t2 /* (t0 <- t1 + t2) */
207 add_i32 t0, t1, t2
256 | ``TCG_COND_TSTEQ /* t1 & t2 == 0 */``
257 | ``TCG_COND_TSTNE /* t1 & t2 != 0 */``
264 * - add *t0*, *t1*, *t2*
266 - | *t0* = *t1* + *t2*
268 * - sub *t0*, *t1*, *t2*
270 - | *t0* = *t1* - *t2*
276 * - mul *t0*, *t1*, *t2*
278 - | *t0* = *t1* * *t2*
[all …]
/openbmc/u-boot/lib/
H A Dsha512.c143 uint64_t a, b, c, d, e, f, g, h, t1, t2; in sha512_transform() local
169 t2 = e0(a) + Maj(a,b,c); d+=t1; h=t1+t2; in sha512_transform()
171 t2 = e0(h) + Maj(h,a,b); c+=t1; g=t1+t2; in sha512_transform()
173 t2 = e0(g) + Maj(g,h,a); b+=t1; f=t1+t2; in sha512_transform()
175 t2 = e0(f) + Maj(f,g,h); a+=t1; e=t1+t2; in sha512_transform()
177 t2 = e0(e) + Maj(e,f,g); h+=t1; d=t1+t2; in sha512_transform()
179 t2 = e0(d) + Maj(d,e,f); g+=t1; c=t1+t2; in sha512_transform()
181 t2 = e0(c) + Maj(c,d,e); f+=t1; b=t1+t2; in sha512_transform()
183 t2 = e0(b) + Maj(b,c,d); e+=t1; a=t1+t2; in sha512_transform()
190 a = b = c = d = e = f = g = h = t1 = t2 = 0; in sha512_transform()
/openbmc/u-boot/arch/riscv/cpu/
H A Dstart.S106 add t2, t0, t3 /* t2 <- source end address */
113 blt t0, t2, copy_loop
120 la t2, __rel_dyn_end
121 beq t1, t2, clear_bss
123 add t2, t2, t6 /* t2 <- rela_dyn_end in RAM */
128 bne t1, t2, 7f
141 ble t1, t2, 6b
164 ble t1, t2, 9b
/openbmc/qemu/tcg/
H A Doptimize.c929 TCGArg t2 = arg_new_temp(ctx); in do_constant_folding_cond2() local
936 op2->args[0] = t2; in do_constant_folding_cond2()
942 args[1] = t2; in do_constant_folding_cond2()
1021 uint64_t t2 = arg_const_val(op->args[2]); in fold_const2() local
1023 t1 = do_constant_folding(op->opc, ctx->type, t1, t2); in fold_const2()
1270 TempOptInfo *t2; in squash_prev_carryout() local
1283 t2 = arg_info(op->args[2]); in squash_prev_carryout()
1284 if (ti_is_const(t2)) { in squash_prev_carryout()
1285 op->args[2] = arg_new_constant(ctx, ti_const_val(t2) + 1); in squash_prev_carryout()
1313 TempOptInfo *t2 = arg_info(op->args[2]); in fold_addci() local
[all …]
/openbmc/u-boot/arch/powerpc/lib/
H A D_ashrdi3.S38 sraw r7,r3,r7 # t2 = MSW >> (count-32)
40 slw r7,r7,r8 # t2 = (count < 32) ? 0 : t2
42 or r4,r4,r7 # LSW |= t2
/openbmc/qemu/target/riscv/insn_trans/
H A Dtrans_rvk.c.inc153 TCGv_i32 t2 = tcg_temp_new_i32();
157 tcg_gen_rotri_i32(t2, t0, num2);
158 tcg_gen_xor_i32(t1, t1, t2);
159 func(t2, t0, num3);
160 tcg_gen_xor_i32(t1, t1, t2);
201 TCGv_i64 t2 = tcg_temp_new_i64();
205 func2(t2, t0, num2);
206 tcg_gen_xor_i64(t1, t1, t2);
207 tcg_gen_rotri_i64(t2, t0, num3);
208 tcg_gen_xor_i64(t1, t1, t2);
[all …]
/openbmc/u-boot/arch/mips/mach-ath79/qca953x/
H A Dlowlevel_init.S103 li t2, 0x08000000
104 or t1, t1, t2
108 li t2, 0xf7ffffff
109 and t1, t1, t2
153 li t2, ~QCA953X_PLL_CONFIG_PWD
154 and t1, t1, t2
159 li t2, ~QCA953X_PLL_CONFIG_PWD
160 and t1, t1, t2
165 li t2, ~PLL_CLK_CTRL_PLL_BYPASS
166 and t1, t1, t2
/openbmc/sdbusplus/test/gen/
H A Dtest_aserver_no_uninitialized_value_constructor.cpp17 sdbusplus::aserver::server::Test<A> t2(ctx, "/"); in main() local
19 assert(t2.some_value() == 0); in main()
21 t2.some_value(4); in main()
/openbmc/openbmc/poky/meta/recipes-support/gmp/gmp/
H A D0001-acinclude.m4-Add-parameter-names-in-prototype-for-g.patch15 3 | void g(int,t1 const*,t1,t2,t1 const*,int){}
45 typedef unsigned long long t1;typedef t1*t2;
46 -void g(int,t1 const*,t1,t2,t1 const*,int){}
47 +void g(int a,t1 const* b,t1 c,t2 d,t1 const* e,int f){}
49 static __inline__ t1 e(t2 rp,t2 up,int n,t1 v0)
H A D0001-Complete-function-prototype-in-acinclude.m4-for-C23-.patch20 typedef unsigned long long t1;typedef t1*t2;
22 +void g(int,t1 const*,t1,t2,t1 const*,int){}
24 static __inline__ t1 e(t2 rp,t2 up,int n,t1 v0)
/openbmc/u-boot/board/CZ.NIC/turris_mox/
H A Dmox_sp.c98 static inline void res_to_mac(u8 *mac, u32 t1, u32 t2) in res_to_mac() argument
102 mac[2] = t2 >> 24; in res_to_mac()
103 mac[3] = t2 >> 16; in res_to_mac()
104 mac[4] = t2 >> 8; in res_to_mac()
105 mac[5] = t2; in res_to_mac()
/openbmc/qemu/tests/qtest/
H A Drtas-test.c14 time_t t1, t2; in run_test_rtas_get_time_of_day() local
21 t2 = mktimegm(&tm); in run_test_rtas_get_time_of_day()
22 g_assert(t2 - t1 < 5); /* 5 sec max to run the test */ in run_test_rtas_get_time_of_day()
/openbmc/qemu/target/loongarch/tcg/insn_trans/
H A Dtrans_vec.c.inc508 TCGv_vec t1, t2;
513 t2 = tcg_temp_new_vec_matching(b);
520 tcg_gen_shli_vec(vece, t2, b, halfbits);
521 tcg_gen_sari_vec(vece, t2, t2, halfbits);
523 tcg_gen_add_vec(vece, t, t1, t2);
528 TCGv_i32 t1, t2;
531 t2 = tcg_temp_new_i32();
533 tcg_gen_ext16s_i32(t2, b);
534 tcg_gen_add_i32(t, t1, t2);
539 TCGv_i64 t1, t2;
[all …]
/openbmc/u-boot/arch/mips/lib/
H A Dcache_init.S153 li t2, 2
154 sllv R_L2_LINE, t2, R_L2_LINE
156 ext t2, t1, GCR_L2_CONFIG_ASSOC_SHIFT, GCR_L2_CONFIG_ASSOC_BITS
157 addiu t2, t2, 1
158 mul R_L2_SIZE, R_L2_LINE, t2
160 ext t2, t1, GCR_L2_CONFIG_SETSZ_SHIFT, GCR_L2_CONFIG_SETSZ_BITS
161 sllv R_L2_SIZE, R_L2_SIZE, t2
162 li t2, 64
163 mul R_L2_SIZE, R_L2_SIZE, t2
401 li t2, GCR_REV_CM3
[all …]
/openbmc/openbmc/meta-bytedance/meta-g220a/recipes-phosphor/datetime/me-time-sync/
H A Dme-time-sync.sh20 t2=$((a[9]*256*256))
22 t=$((t0+t1+t2+t3))

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