Searched refs:ss_state (Results 1 – 3 of 3) sorted by relevance
863 int ss_state; in srcu_gp_end() local886 ss_state = smp_load_acquire(&sup->srcu_size_state); in srcu_gp_end()887 if (ss_state < SRCU_SIZE_WAIT_BARRIER) { in srcu_gp_end()897 cbs = ss_state < SRCU_SIZE_BIG || snp->srcu_have_cbs[idx] == gpseq; in srcu_gp_end()903 if (ss_state < SRCU_SIZE_BIG) in srcu_gp_end()942 if (ss_state != SRCU_SIZE_SMALL && ss_state != SRCU_SIZE_BIG) { in srcu_gp_end()943 if (ss_state == SRCU_SIZE_ALLOC) in srcu_gp_end()946 smp_store_release(&sup->srcu_size_state, ss_state + 1); in srcu_gp_end()1227 int ss_state; in srcu_gp_start_if_needed() local1236 ss_state = smp_load_acquire(&ssp->srcu_sup->srcu_size_state); in srcu_gp_start_if_needed()[all …]
814 int amdgpu_acpi_smart_shift_update(struct drm_device *dev, enum amdgpu_ss ss_state) in amdgpu_acpi_smart_shift_update() argument822 switch (ss_state) { in amdgpu_acpi_smart_shift_update()
1423 int amdgpu_acpi_smart_shift_update(struct drm_device *dev, enum amdgpu_ss ss_state);1455 enum amdgpu_ss ss_state) { return 0; } in amdgpu_acpi_smart_shift_update() argument