Searched refs:srds_prtcl_s1 (Results 1 – 6 of 6) sorted by relevance
45 u32 srds_prtcl_s1, srds_prtcl_s2; in board_eth_init() local47 srds_prtcl_s1 = in_be32(&gur->rcwsr[4]) & in board_eth_init()49 srds_prtcl_s1 >>= FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT; in board_eth_init()69 if ((srds_prtcl_s1 == 28) || (srds_prtcl_s1 == 27)) { in board_eth_init()
96 u32 srds_prtcl_s1; in brd_mux_lane_to_slot() local98 srds_prtcl_s1 = in_be32(&gur->rcwsr[4]) & in brd_mux_lane_to_slot()100 srds_prtcl_s1 >>= FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT; in brd_mux_lane_to_slot()107 switch (srds_prtcl_s1) { in brd_mux_lane_to_slot()266 srds_prtcl_s1); in brd_mux_lane_to_slot()
91 u32 srds_prtcl_s1; in board_mux_lane_to_slot() local94 srds_prtcl_s1 = in_be32(&gur->rcwsr[4]) & in board_mux_lane_to_slot()96 srds_prtcl_s1 >>= FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT; in board_mux_lane_to_slot()102 switch (srds_prtcl_s1) { in board_mux_lane_to_slot()147 srds_prtcl_s1); in board_mux_lane_to_slot()
97 u32 srds_prtcl_s1; in board_mux_lane() local100 srds_prtcl_s1 = in_be32(&gur->rcwsr[4]) & in board_mux_lane()102 srds_prtcl_s1 >>= FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT; in board_mux_lane()104 if (srds_prtcl_s1 == 0x95) { in board_mux_lane()
344 u32 srds_prtcl_s1, srds_prtcl_s2; in config_frontside_crossbar_vsc3316() local351 srds_prtcl_s1 = in_be32(&gur->rcwsr[4]) & in config_frontside_crossbar_vsc3316()353 srds_prtcl_s1 >>= FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT; in config_frontside_crossbar_vsc3316()354 switch (srds_prtcl_s1) { in config_frontside_crossbar_vsc3316()
493 u32 srds_prtcl_s1, srds_prtcl_s2; in board_eth_init() local495 srds_prtcl_s1 = in_be32(&gur->rcwsr[4]) & in board_eth_init()497 srds_prtcl_s1 >>= FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT; in board_eth_init()533 switch (srds_prtcl_s1) { in board_eth_init()