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Searched refs:spr (Results 1 – 25 of 73) sorted by relevance

123

/openbmc/qemu/target/ppc/
H A Dpower8-pmu.c112 tmp = env->spr[SPR_POWER_PMC1]; in pmu_increment_insns()
118 env->spr[SPR_POWER_PMC1] = tmp; in pmu_increment_insns()
122 tmp = env->spr[SPR_POWER_PMC2]; in pmu_increment_insns()
128 env->spr[SPR_POWER_PMC2] = tmp; in pmu_increment_insns()
132 tmp = env->spr[SPR_POWER_PMC3]; in pmu_increment_insns()
138 env->spr[SPR_POWER_PMC3] = tmp; in pmu_increment_insns()
156 tmp = env->spr[SPR_POWER_PMC5]; in pmu_increment_insns()
261 env->spr[SPR_POWER_MMCR0] = value; in helper_store_mmcr0()
273 env->spr[SPR_POWER_MMCR1] = value; in helper_store_mmcr1()
282 return env->spr[sprn]; in helper_read_pmc()
[all …]
H A Dmisc_helper.c37 env->spr[sprn]); in helper_load_dump_spr()
43 env->spr[sprn]); in helper_store_dump_spr()
54 assert(core_id == env->spr[SPR_PIR] - env->spr[SPR_TIR]); in helper_spr_core_write_generic()
57 env->spr[sprn] = val; in helper_spr_core_write_generic()
63 cenv->spr[sprn] = val; in helper_spr_core_write_generic()
77 env->spr[sprn] &= ~1U; in helper_spr_write_CTRL()
78 env->spr[sprn] |= run; in helper_spr_write_CTRL()
87 cenv->spr[sprn] |= ts; in helper_spr_write_CTRL()
189 env->spr[SPR_PTCR] = val; in helper_store_ptcr()
353 v = env->spr[i]; in helper_fixup_thrm()
[all …]
H A Dexcp_helper.c185 env->spr[SPR_HASH1], env->spr[SPR_HASH2], in ppc_excp_debug_sw_tlb()
496 trace_ppc_excp_dsi(env->spr[SPR_40x_ESR], env->spr[SPR_40x_DEAR]); in powerpc_excp_40x()
611 trace_ppc_excp_dsi(env->spr[SPR_DSISR], env->spr[SPR_DAR]); in powerpc_excp_6xx()
770 trace_ppc_excp_dsi(env->spr[SPR_DSISR], env->spr[SPR_DAR]); in powerpc_excp_7xx()
942 trace_ppc_excp_dsi(env->spr[SPR_DSISR], env->spr[SPR_DAR]); in powerpc_excp_74xx()
1446 trace_ppc_excp_dsi(env->spr[SPR_DSISR], env->spr[SPR_DAR]); in powerpc_excp_books()
2759 do_rfi(env, env->spr[SPR_SRR0], env->spr[SPR_SRR1]); in helper_rfid()
2769 do_rfi(env, env->spr[SPR_HSRR0], env->spr[SPR_HSRR1]); in helper_hrfid()
2854 do_rfi(env, env->spr[SPR_40x_SRR2], env->spr[SPR_40x_SRR3]); in helper_40x_rfci()
2859 do_rfi(env, env->spr[SPR_BOOKE_CSRR0], env->spr[SPR_BOOKE_CSRR1]); in helper_rfci()
[all …]
H A Dmmu_helper.c570 RPN = env->spr[SPR_RPA]; in do_6xx_tlb()
572 CMP = env->spr[SPR_ICMP]; in do_6xx_tlb()
573 EPN = env->spr[SPR_IMISS]; in do_6xx_tlb()
575 CMP = env->spr[SPR_DCMP]; in do_6xx_tlb()
576 EPN = env->spr[SPR_DMISS]; in do_6xx_tlb()
1009 env->spr[pidn] = pid; in helper_booke_setpid()
1109 env->spr[SPR_BOOKE_MAS3]; in helper_booke206_tlbwe()
1208 env->spr[SPR_BOOKE_MAS0] = env->spr[SPR_BOOKE_MAS4] & MAS4_TLBSELD_MASK; in helper_booke206_tlbsx()
1209 env->spr[SPR_BOOKE_MAS1] = env->spr[SPR_BOOKE_MAS4] & MAS4_TSIZED_MASK; in helper_booke206_tlbsx()
1210 env->spr[SPR_BOOKE_MAS2] = env->spr[SPR_BOOKE_MAS4] & MAS4_WIMGED_MASK; in helper_booke206_tlbsx()
[all …]
H A Dmmu_common.c61 env->spr[SPR_SDR1] = value; in ppc_store_sdr1()
615 if (env->spr[SPR_BOOKE_PID1] && in mmubooke_check_pid()
619 if (env->spr[SPR_BOOKE_PID2] && in mmubooke_check_pid()
809 if (env->spr[SPR_BOOKE_PID1] && in mmubooke206_check_tlb()
1256 env->spr[SPR_BOOKE_MAS0] = env->spr[SPR_BOOKE_MAS4] & MAS4_TLBSELD_MASK; in booke206_update_mas_tlb_miss()
1257 env->spr[SPR_BOOKE_MAS1] = env->spr[SPR_BOOKE_MAS4] & MAS4_TSIZED_MASK; in booke206_update_mas_tlb_miss()
1258 env->spr[SPR_BOOKE_MAS2] = env->spr[SPR_BOOKE_MAS4] & MAS4_WIMGED_MASK; in booke206_update_mas_tlb_miss()
1259 env->spr[SPR_BOOKE_MAS3] = 0; in booke206_update_mas_tlb_miss()
1260 env->spr[SPR_BOOKE_MAS6] = 0; in booke206_update_mas_tlb_miss()
1261 env->spr[SPR_BOOKE_MAS7] = 0; in booke206_update_mas_tlb_miss()
[all …]
H A Dmachine.c159 env->spr[SPR_LR] = env->lr; in cpu_pre_save()
160 env->spr[SPR_CTR] = env->ctr; in cpu_pre_save()
161 env->spr[SPR_XER] = cpu_read_xer(env); in cpu_pre_save()
163 env->spr[SPR_CFAR] = env->cfar; in cpu_pre_save()
165 env->spr[SPR_BOOKE_SPEFSCR] = env->spe_fscr; in cpu_pre_save()
297 env->lr = env->spr[SPR_LR]; in cpu_post_load()
298 env->ctr = env->spr[SPR_CTR]; in cpu_post_load()
299 cpu_write_xer(env, env->spr[SPR_XER]); in cpu_post_load()
301 env->cfar = env->spr[SPR_CFAR]; in cpu_post_load()
303 env->spe_fscr = env->spr[SPR_BOOKE_SPEFSCR]; in cpu_post_load()
[all …]
H A Dmmu-hash32.c223 env->spr[SPR_DAR] = eaddr; in ppc_hash32_direct_store()
228 env->spr[SPR_DAR] = eaddr; in ppc_hash32_direct_store()
230 env->spr[SPR_DSISR] = 0x06000000; in ppc_hash32_direct_store()
232 env->spr[SPR_DSISR] = 0x04000000; in ppc_hash32_direct_store()
248 env->spr[SPR_DAR] = eaddr; in ppc_hash32_direct_store()
250 env->spr[SPR_DSISR] = 0x06100000; in ppc_hash32_direct_store()
252 env->spr[SPR_DSISR] = 0x04100000; in ppc_hash32_direct_store()
268 env->spr[SPR_DAR] = eaddr; in ppc_hash32_direct_store()
270 env->spr[SPR_DSISR] = 0x0a000000; in ppc_hash32_direct_store()
465 env->spr[SPR_DAR] = eaddr; in ppc_hash32_xlate()
[all …]
H A Dkvm.c200 sregs.pvr = cenv->spr[SPR_PVR]; in kvm_arch_sync_sregs()
568 env->spr[spr] = val.u32; in kvm_get_one_spr()
572 env->spr[spr] = val.u64; in kvm_get_one_spr()
598 val.u32 = env->spr[spr]; in kvm_put_one_spr()
602 val.u64 = env->spr[spr]; in kvm_put_one_spr()
862 sregs.pvr = env->spr[SPR_PVR]; in kvmppc_put_books_sregs()
919 regs.srr0 = env->spr[SPR_SRR0]; in kvm_arch_put_registers()
920 regs.srr1 = env->spr[SPR_SRR1]; in kvm_arch_put_registers()
1016 env->excp_vectors[vector] = env->spr[ivor] + env->spr[SPR_BOOKE_IVPR]; in kvm_sync_excp()
1224 env->spr[SPR_SRR0] = regs.srr0; in kvm_arch_get_registers()
[all …]
H A Dmmu-book3s-v3.h70 return !!(cpu->env.spr[SPR_LPCR] & LPCR_UPRT); in ppc64_use_proc_tbl()
83 return !!(cpu->env.spr[SPR_LPCR] & LPCR_HR); in ppc64_v3_radix()
96 if (!ppc64_v3_get_pate(cpu, cpu->env.spr[SPR_LPIDR], &pate)) { in ppc_hash64_hpt_base()
101 base = cpu->env.spr[SPR_SDR1]; in ppc_hash64_hpt_base()
118 if (!ppc64_v3_get_pate(cpu, cpu->env.spr[SPR_LPIDR], &pate)) { in ppc_hash64_hpt_mask()
123 base = cpu->env.spr[SPR_SDR1]; in ppc_hash64_hpt_mask()
H A Dhelper_regs.c321 env->spr[SPR_405_SLER] = val; in store_40x_sler()
367 assert(spr->name == NULL); in _spr_register()
370 spr->name = name; in _spr_register()
372 env->spr[num] = initial_value; in _spr_register()
375 spr->uea_read = uea_read; in _spr_register()
376 spr->uea_write = uea_write; in _spr_register()
378 spr->oea_read = oea_read; in _spr_register()
379 spr->oea_write = oea_write; in _spr_register()
380 spr->hea_read = hea_read; in _spr_register()
381 spr->hea_write = hea_write; in _spr_register()
[all …]
H A Dmmu-radix64.c47 *lpid = env->spr[SPR_LPIDR]; in ppc_radix64_get_fully_qualified_addr()
51 *lpid = env->spr[SPR_LPIDR]; in ppc_radix64_get_fully_qualified_addr()
64 *lpid = env->spr[SPR_LPIDR]; in ppc_radix64_get_fully_qualified_addr()
71 *lpid = env->spr[SPR_LPIDR]; in ppc_radix64_get_fully_qualified_addr()
97 env->spr[SPR_DAR] = eaddr; in ppc_radix64_raise_segi()
133 env->spr[SPR_DSISR] = cause; in ppc_radix64_raise_si()
134 env->spr[SPR_DAR] = eaddr; in ppc_radix64_raise_si()
164 env->spr[SPR_ASDR] = g_raddr; in ppc_radix64_raise_hsi()
173 env->spr[SPR_HDSISR] = cause; in ppc_radix64_raise_hsi()
174 env->spr[SPR_HDAR] = eaddr; in ppc_radix64_raise_hsi()
[all …]
H A Dgdbstub.c313 ppc_spr_t *spr = &env->spr_cb[i]; in ppc_gdb_gen_spr_xml() local
315 if (!spr->name) { in ppc_gdb_gen_spr_xml()
327 spr->gdb_id = num_regs; in ppc_gdb_gen_spr_xml()
340 ppc_spr_t *spr = &env->spr_cb[i]; in ppc_gdb_gen_spr_xml() local
342 if (!spr->name) { in ppc_gdb_gen_spr_xml()
346 spr_name = g_ascii_strdown(spr->name, -1); in ppc_gdb_gen_spr_xml()
377 ppc_spr_t *spr = &env->spr_cb[i]; in gdb_find_spr_idx() local
379 if (spr->name && spr->gdb_id == n) { in gdb_find_spr_idx()
397 gdb_get_regl(buf, env->spr[reg]); in gdb_get_spr_reg()
414 env->spr[reg] = ldn_p(mem_buf, len); in gdb_set_spr_reg()
[all …]
H A Dcpu.c100 env->spr[SPR_LPCR] = val & pcc->lpcr_mask; in ppc_store_lpcr()
111 target_ulong ciabr = env->spr[SPR_CIABR]; in ppc_update_ciabr()
129 env->spr[SPR_CIABR] = val; in ppc_store_ciabr()
136 target_ulong deaw = env->spr[SPR_DAWR0] & PPC_BITMASK(0, 60); in ppc_update_daw0()
137 uint32_t dawrx = env->spr[SPR_DAWRX0]; in ppc_update_daw0()
174 env->spr[SPR_DAWR0] = val; in ppc_store_dawr0()
188 env->spr[SPR_DAWRX0] = val; in ppc_store_dawrx0()
H A Dmmu-hash64.c676 if (env->spr[SPR_LPCR] & LPCR_ISL) { in ppc_hash64_htab_lookup()
786 env->spr[SPR_ASDR] = slb_vsid; in ppc_hash64_set_isi()
806 env->spr[SPR_HDAR] = dar; in ppc_hash64_set_dsi()
807 env->spr[SPR_HDSISR] = dsisr; in ppc_hash64_set_dsi()
808 env->spr[SPR_ASDR] = slb_vsid; in ppc_hash64_set_dsi()
811 env->spr[SPR_DAR] = dar; in ppc_hash64_set_dsi()
812 env->spr[SPR_DSISR] = dsisr; in ppc_hash64_set_dsi()
903 uint64_t lpcr = env->spr[SPR_LPCR]; in get_vrma_llp()
978 raddr |= env->spr[SPR_HRMOR]; in ppc_hash64_xlate()
1018 raddr |= env->spr[SPR_RMOR]; in ppc_hash64_xlate()
[all …]
H A Dppc-qmp-cmds.c155 ppc_spr_t *spr = &env->spr_cb[i]; in target_get_monitor_def() local
157 if (spr->name && (strcasecmp(name, spr->name) == 0)) { in target_get_monitor_def()
158 *pval = env->spr[i]; in target_get_monitor_def()
H A Dmmu-book3s-v3.c28 uint64_t patb = cpu->env.spr[SPR_PTCR] & PTCR_PATB; in ppc64_v3_get_pate()
29 uint64_t pats = cpu->env.spr[SPR_PTCR] & PTCR_PATS; in ppc64_v3_get_pate()
H A Duser_only_helper.c50 env->spr[SPR_DAR] = address; in ppc_cpu_record_sigsegv()
51 env->spr[SPR_DSISR] = error_code; in ppc_cpu_record_sigsegv()
H A Dmmu-radix64.h62 int amr = env->spr[SPR_AMR] >> 62; /* We only care about key0 AMR63:62 */ in ppc_radix64_get_prot_amr()
63 int iamr = env->spr[SPR_IAMR] >> 62; /* We only care about key0 IAMR63:62 */ in ppc_radix64_get_prot_amr()
/openbmc/qemu/hw/ppc/
H A Dspapr_nested.c74 save->lpcr = env->spr[SPR_LPCR]; in nested_save_state()
76 save->pcr = env->spr[SPR_PCR]; in nested_save_state()
79 save->srr0 = env->spr[SPR_SRR0]; in nested_save_state()
80 save->srr1 = env->spr[SPR_SRR1]; in nested_save_state()
86 save->ppr = env->spr[SPR_PPR]; in nested_save_state()
109 env->spr[SPR_PCR] = load->pcr; in nested_load_state()
119 env->spr[SPR_PPR] = load->ppr; in nested_load_state()
290 hsrr0 = env->spr[SPR_HSRR0]; in spapr_exit_nested()
291 hsrr1 = env->spr[SPR_HSRR1]; in spapr_exit_nested()
292 hdar = env->spr[SPR_HDAR]; in spapr_exit_nested()
[all …]
H A Dppc_booke.c81 (env->spr[SPR_BOOKE_TSR] & TSR_DIS in booke_update_irq()
82 && env->spr[SPR_BOOKE_TCR] & TCR_DIE)); in booke_update_irq()
85 (env->spr[SPR_BOOKE_TSR] & TSR_WIS in booke_update_irq()
89 (env->spr[SPR_BOOKE_TSR] & TSR_FIS in booke_update_irq()
141 if (!(env->spr[SPR_BOOKE_TSR] & tsr_bit)) { in booke_update_fixed_timer()
195 env->spr[SPR_BOOKE_TSR] |= TSR_DIS; in booke_decr_cb()
198 if (env->spr[SPR_BOOKE_TCR] & TCR_ARE) { in booke_decr_cb()
201 if (env->spr[SPR_BOOKE_DECAR] != 0) { in booke_decr_cb()
217 env->spr[SPR_BOOKE_TSR] |= TSR_FIS; in booke_fit_cb()
255 env->spr[SPR_BOOKE_TSR] &= ~val; in store_booke_tsr()
[all …]
H A Dppc.c287 dbsr = env->spr[SPR_40x_DBSR]; in ppc40x_core_reset()
290 env->spr[SPR_40x_DBSR] = dbsr; in ppc40x_core_reset()
301 dbsr = env->spr[SPR_40x_DBSR]; in ppc40x_chip_reset()
304 env->spr[SPR_40x_DBSR] = dbsr; in ppc40x_chip_reset()
522 return env->spr[SPR_TBL]; in cpu_ppc_load_tbl()
547 return env->spr[SPR_TBU]; in cpu_ppc_load_tbu()
755 return env->spr[SPR_DECR]; in cpu_ppc_load_decr()
1207 env->spr[SPR_40x_TCR], env->spr[SPR_40x_TSR]); in cpu_4xx_fit_cb()
1254 env->spr[SPR_40x_TCR], env->spr[SPR_40x_TSR], in cpu_4xx_pit_cb()
1288 trace_ppc4xx_wdt(env->spr[SPR_40x_TCR], env->spr[SPR_40x_TSR]); in cpu_4xx_wdt_cb()
[all …]
/openbmc/linux/arch/powerpc/xmon/
H A Dspr_access.S34 spr = 0 define
36 mfspr r3, spr
38 spr = spr + 1 define
42 spr = 0 define
44 mtspr spr, r4
46 spr = spr + 1 define
/openbmc/qemu/target/openrisc/
H A Dsys_helper.c52 switch (spr) { in HELPER()
63 switch (spr) { in HELPER()
96 idx = (spr - 1024); in HELPER()
101 idx = spr - TO_SPR(1, 512); in HELPER()
112 idx = spr - TO_SPR(1, 640); in HELPER()
124 idx = spr - TO_SPR(2, 512); in HELPER()
135 idx = spr - TO_SPR(2, 640); in HELPER()
227 switch (spr) { in HELPER()
237 switch (spr) { in HELPER()
295 idx = (spr - 1024); in HELPER()
[all …]
/openbmc/linux/drivers/gpu/drm/ci/
H A Dtestlist.txt2131 kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move
2132 kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff
2135 kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-move
2136 kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff
2139 kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-move
2140 kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff
2143 kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move
2144 kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-onoff
2147 kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-move
2148 kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-onoff
[all …]
/openbmc/openbmc/poky/meta/recipes-devtools/valgrind/valgrind/
H A DAdded-support-for-PPC-instructions-mfatbu-mfatbl.patch46 + UInt spr;
48 + __asm__ __volatile__("mfspr %0,527" : "=b"(spr));
50 + __asm__ __volatile__("mfspr %0,526" : "=b"(spr));
52 + return spr;

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