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Searched refs:spr (Results 1 – 25 of 72) sorted by relevance

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/openbmc/qemu/target/ppc/
H A Dpower8-pmu.c145 tmp = env->spr[SPR_POWER_PMC1]; in pmu_increment_insns()
151 env->spr[SPR_POWER_PMC1] = tmp; in pmu_increment_insns()
155 tmp = env->spr[SPR_POWER_PMC2]; in pmu_increment_insns()
161 env->spr[SPR_POWER_PMC2] = tmp; in pmu_increment_insns()
165 tmp = env->spr[SPR_POWER_PMC3]; in pmu_increment_insns()
171 env->spr[SPR_POWER_PMC3] = tmp; in pmu_increment_insns()
294 env->spr[SPR_POWER_MMCR0] = value; in helper_store_mmcr0()
306 env->spr[SPR_POWER_MMCR1] = value; in helper_store_mmcr1()
313 env->spr[SPR_POWER_MMCRA] = value; in helper_store_mmcrA()
322 return env->spr[sprn]; in helper_read_pmc()
[all …]
H A Dmmu-booke.c146 if (env->spr[SPR_BOOKE_PID1] && in mmubooke_check_pid()
150 if (env->spr[SPR_BOOKE_PID2] && in mmubooke_check_pid()
324 if (env->spr[SPR_BOOKE_PID1] && in mmubooke206_check_tlb()
433 env->spr[SPR_BOOKE_MAS0] = env->spr[SPR_BOOKE_MAS4] & MAS4_TLBSELD_MASK; in booke206_update_mas_tlb_miss()
434 env->spr[SPR_BOOKE_MAS1] = env->spr[SPR_BOOKE_MAS4] & MAS4_TSIZED_MASK; in booke206_update_mas_tlb_miss()
435 env->spr[SPR_BOOKE_MAS2] = env->spr[SPR_BOOKE_MAS4] & MAS4_WIMGED_MASK; in booke206_update_mas_tlb_miss()
436 env->spr[SPR_BOOKE_MAS3] = 0; in booke206_update_mas_tlb_miss()
437 env->spr[SPR_BOOKE_MAS6] = 0; in booke206_update_mas_tlb_miss()
438 env->spr[SPR_BOOKE_MAS7] = 0; in booke206_update_mas_tlb_miss()
461 env->spr[SPR_BOOKE_MAS6] |= env->spr[SPR_BOOKE_PID] << 16; in booke206_update_mas_tlb_miss()
[all …]
H A Dexcp_helper.c188 env->spr[SPR_HASH1], env->spr[SPR_HASH2], in ppc_excp_debug_sw_tlb()
519 trace_ppc_excp_dsi(env->spr[SPR_40x_ESR], env->spr[SPR_40x_DEAR]); in powerpc_excp_40x()
622 trace_ppc_excp_dsi(env->spr[SPR_DSISR], env->spr[SPR_DAR]); in powerpc_excp_6xx()
763 trace_ppc_excp_dsi(env->spr[SPR_DSISR], env->spr[SPR_DAR]); in powerpc_excp_7xx()
913 trace_ppc_excp_dsi(env->spr[SPR_DSISR], env->spr[SPR_DAR]); in powerpc_excp_74xx()
1390 trace_ppc_excp_dsi(env->spr[SPR_DSISR], env->spr[SPR_DAR]); in powerpc_excp_books()
2668 do_rfi(env, env->spr[SPR_SRR0], env->spr[SPR_SRR1]); in helper_rfid()
2678 do_rfi(env, env->spr[SPR_HSRR0], env->spr[SPR_HSRR1]); in helper_hrfid()
2761 do_rfi(env, env->spr[SPR_40x_SRR2], env->spr[SPR_40x_SRR3]); in helper_40x_rfci()
2766 do_rfi(env, env->spr[SPR_BOOKE_CSRR0], env->spr[SPR_BOOKE_CSRR1]); in helper_rfci()
[all …]
H A Dmisc_helper.c37 env->spr[sprn]); in helper_load_dump_spr()
43 env->spr[sprn]); in helper_store_dump_spr()
53 env->spr[sprn] = val; in helper_spr_core_write_generic()
59 cenv->spr[sprn] = val; in helper_spr_core_write_generic()
73 env->spr[sprn] &= ~1U; in helper_spr_write_CTRL()
74 env->spr[sprn] |= run; in helper_spr_write_CTRL()
82 cenv->spr[sprn] &= ts_mask; in helper_spr_write_CTRL()
83 cenv->spr[sprn] |= ts; in helper_spr_write_CTRL()
165 if (env->spr[SPR_SDR1] != val) { in helper_store_sdr1()
442 v = env->spr[i]; in helper_fixup_thrm()
[all …]
H A Dmmu_helper.c564 RPN = env->spr[SPR_RPA]; in do_6xx_tlb()
566 CMP = env->spr[SPR_ICMP]; in do_6xx_tlb()
569 CMP = env->spr[SPR_DCMP]; in do_6xx_tlb()
842 if (env->spr[SPR_BOOKE_PID1] && tlb->PID == env->spr[SPR_BOOKE_PID1]) { in mmubooke_pid_match()
845 if (env->spr[SPR_BOOKE_PID2] && tlb->PID == env->spr[SPR_BOOKE_PID2]) { in mmubooke_pid_match()
996 env->spr[pidn] = pid; in helper_booke_setpid()
1096 env->spr[SPR_BOOKE_MAS3]; in helper_booke206_tlbwe()
1195 env->spr[SPR_BOOKE_MAS0] = env->spr[SPR_BOOKE_MAS4] & MAS4_TLBSELD_MASK; in helper_booke206_tlbsx()
1196 env->spr[SPR_BOOKE_MAS1] = env->spr[SPR_BOOKE_MAS4] & MAS4_TSIZED_MASK; in helper_booke206_tlbsx()
1197 env->spr[SPR_BOOKE_MAS2] = env->spr[SPR_BOOKE_MAS4] & MAS4_WIMGED_MASK; in helper_booke206_tlbsx()
[all …]
H A Dmachine.c159 env->spr[SPR_LR] = env->lr; in cpu_pre_save()
160 env->spr[SPR_CTR] = env->ctr; in cpu_pre_save()
161 env->spr[SPR_XER] = cpu_read_xer(env); in cpu_pre_save()
163 env->spr[SPR_CFAR] = env->cfar; in cpu_pre_save()
165 env->spr[SPR_BOOKE_SPEFSCR] = env->spe_fscr; in cpu_pre_save()
297 env->lr = env->spr[SPR_LR]; in cpu_post_load()
298 env->ctr = env->spr[SPR_CTR]; in cpu_post_load()
299 cpu_write_xer(env, env->spr[SPR_XER]); in cpu_post_load()
301 env->cfar = env->spr[SPR_CFAR]; in cpu_post_load()
303 env->spe_fscr = env->spr[SPR_BOOKE_SPEFSCR]; in cpu_post_load()
[all …]
H A Dmmu-hash32.c145 env->spr[SPR_DAR] = eaddr; in ppc_hash32_direct_store()
150 env->spr[SPR_DAR] = eaddr; in ppc_hash32_direct_store()
152 env->spr[SPR_DSISR] = 0x06000000; in ppc_hash32_direct_store()
154 env->spr[SPR_DSISR] = 0x04000000; in ppc_hash32_direct_store()
170 env->spr[SPR_DAR] = eaddr; in ppc_hash32_direct_store()
172 env->spr[SPR_DSISR] = 0x06100000; in ppc_hash32_direct_store()
174 env->spr[SPR_DSISR] = 0x04100000; in ppc_hash32_direct_store()
194 env->spr[SPR_DAR] = eaddr; in ppc_hash32_direct_store()
196 env->spr[SPR_DSISR] = 0x0a000000; in ppc_hash32_direct_store()
372 env->spr[SPR_DAR] = eaddr; in ppc_hash32_xlate()
[all …]
H A Dkvm.c209 sregs.pvr = cenv->spr[SPR_PVR]; in kvm_arch_sync_sregs()
576 env->spr[spr] = val.u32; in kvm_get_one_spr()
580 env->spr[spr] = val.u64; in kvm_get_one_spr()
605 val.u32 = env->spr[spr]; in kvm_put_one_spr()
609 val.u64 = env->spr[spr]; in kvm_put_one_spr()
867 sregs.pvr = env->spr[SPR_PVR]; in kvmppc_put_books_sregs()
922 regs.srr0 = env->spr[SPR_SRR0]; in kvm_arch_put_registers()
923 regs.srr1 = env->spr[SPR_SRR1]; in kvm_arch_put_registers()
1019 env->excp_vectors[vector] = env->spr[ivor] + env->spr[SPR_BOOKE_IVPR]; in kvm_sync_excp()
1227 env->spr[SPR_SRR0] = regs.srr0; in kvm_arch_get_registers()
[all …]
H A Dhelper_regs.c363 env->spr[SPR_405_SLER] = val; in store_40x_sler()
409 assert(spr->name == NULL); in _spr_register()
412 spr->name = name; in _spr_register()
414 env->spr[num] = initial_value; in _spr_register()
417 spr->uea_read = uea_read; in _spr_register()
418 spr->uea_write = uea_write; in _spr_register()
420 spr->oea_read = oea_read; in _spr_register()
421 spr->oea_write = oea_write; in _spr_register()
422 spr->hea_read = hea_read; in _spr_register()
423 spr->hea_write = hea_write; in _spr_register()
[all …]
H A Dmmu_common.c63 env->spr[SPR_SDR1] = value; in ppc_store_sdr1()
164 env->spr[r] = ptem; in ppc6xx_tlb_check()
630 env->spr[SPR_40x_DEAR] = eaddr; in ppc_40x_xlate()
647 env->spr[SPR_40x_DEAR] = eaddr; in ppc_40x_xlate()
711 env->spr[SPR_IMISS] = eaddr; in ppc_6xx_xlate()
742 env->spr[SPR_DMISS] = eaddr; in ppc_6xx_xlate()
755 env->spr[SPR_DAR] = eaddr; in ppc_6xx_xlate()
769 env->spr[SPR_DAR] = eaddr; in ppc_6xx_xlate()
775 env->spr[SPR_DAR] = eaddr; in ppc_6xx_xlate()
786 env->spr[SPR_DAR] = eaddr; in ppc_6xx_xlate()
[all …]
H A Dmmu-radix64.c80 *lpid = env->spr[SPR_LPIDR]; in ppc_radix64_get_fully_qualified_addr()
84 *lpid = env->spr[SPR_LPIDR]; in ppc_radix64_get_fully_qualified_addr()
97 *lpid = env->spr[SPR_LPIDR]; in ppc_radix64_get_fully_qualified_addr()
104 *lpid = env->spr[SPR_LPIDR]; in ppc_radix64_get_fully_qualified_addr()
130 env->spr[SPR_DAR] = eaddr; in ppc_radix64_raise_segi()
166 env->spr[SPR_DSISR] = cause; in ppc_radix64_raise_si()
167 env->spr[SPR_DAR] = eaddr; in ppc_radix64_raise_si()
197 env->spr[SPR_ASDR] = g_raddr; in ppc_radix64_raise_hsi()
206 env->spr[SPR_HDSISR] = cause; in ppc_radix64_raise_hsi()
207 env->spr[SPR_HDAR] = eaddr; in ppc_radix64_raise_hsi()
[all …]
H A Dgdbstub.c309 ppc_spr_t *spr = &env->spr_cb[i]; in gdb_gen_spr_feature() local
311 if (!spr->name) { in gdb_gen_spr_feature()
323 spr->gdb_id = num_regs; in gdb_gen_spr_feature()
336 ppc_spr_t *spr = &env->spr_cb[i]; in gdb_gen_spr_feature() local
338 if (!spr->name) { in gdb_gen_spr_feature()
357 ppc_spr_t *spr = &env->spr_cb[i]; in gdb_find_spr_idx() local
359 if (spr->name && spr->gdb_id == n) { in gdb_find_spr_idx()
401 val = env->spr[reg]; in gdb_get_spr_reg()
433 env->spr[reg] = val; in gdb_set_spr_reg()
498 gdb_get_reg32(buf, (uint32_t)env->spr[SPR_VRSAVE]); in gdb_get_avr_reg()
[all …]
H A Dcpu.c100 env->spr[SPR_LPCR] = val & pcc->lpcr_mask; in ppc_store_lpcr()
111 target_ulong ciabr = env->spr[SPR_CIABR]; in ppc_update_ciabr()
129 env->spr[SPR_CIABR] = val; in ppc_store_ciabr()
136 target_ulong deaw = env->spr[SPR_DAWR0] & PPC_BITMASK(0, 60); in ppc_update_daw0()
137 uint32_t dawrx = env->spr[SPR_DAWRX0]; in ppc_update_daw0()
174 env->spr[SPR_DAWR0] = val; in ppc_store_dawr0()
188 env->spr[SPR_DAWRX0] = val; in ppc_store_dawrx0()
H A Dmmu-hash64.c527 base = cpu->env.spr[SPR_SDR1]; in ppc_hash64_hpt_base()
547 base = cpu->env.spr[SPR_SDR1]; in ppc_hash64_hpt_mask()
723 if (env->spr[SPR_LPCR] & LPCR_ISL) { in ppc_hash64_htab_lookup()
833 env->spr[SPR_ASDR] = slb_vsid; in ppc_hash64_set_isi()
853 env->spr[SPR_HDAR] = dar; in ppc_hash64_set_dsi()
854 env->spr[SPR_HDSISR] = dsisr; in ppc_hash64_set_dsi()
855 env->spr[SPR_ASDR] = slb_vsid; in ppc_hash64_set_dsi()
858 env->spr[SPR_DAR] = dar; in ppc_hash64_set_dsi()
859 env->spr[SPR_DSISR] = dsisr; in ppc_hash64_set_dsi()
1061 raddr |= env->spr[SPR_RMOR]; in ppc_hash64_xlate()
[all …]
H A Dppc-qmp-cmds.c158 ppc_spr_t *spr = &env->spr_cb[i]; in target_get_monitor_def() local
160 if (spr->name && (strcasecmp(name, spr->name) == 0)) { in target_get_monitor_def()
161 *pval = env->spr[i]; in target_get_monitor_def()
H A Dmmu-book3s-v3.c27 uint64_t patb = cpu->env.spr[SPR_PTCR] & PTCR_PATB; in ppc64_v3_get_pate()
28 uint64_t pats = cpu->env.spr[SPR_PTCR] & PTCR_PATS; in ppc64_v3_get_pate()
H A Duser_only_helper.c49 env->spr[SPR_DAR] = address; in ppc_cpu_record_sigsegv()
50 env->spr[SPR_DSISR] = error_code; in ppc_cpu_record_sigsegv()
H A Dmmu-book3s-v3.h67 return !!(cpu->env.spr[SPR_LPCR] & LPCR_UPRT); in ppc64_use_proc_tbl()
80 return !!(cpu->env.spr[SPR_LPCR] & LPCR_HR); in ppc64_v3_radix()
/openbmc/qemu/hw/ppc/
H A Dspapr_nested.c152 save->lpcr = env->spr[SPR_LPCR]; in nested_save_state()
154 save->pcr = env->spr[SPR_PCR]; in nested_save_state()
157 save->srr0 = env->spr[SPR_SRR0]; in nested_save_state()
158 save->srr1 = env->spr[SPR_SRR1]; in nested_save_state()
164 save->ppr = env->spr[SPR_PPR]; in nested_save_state()
253 env->spr[SPR_PCR] = load->pcr; in nested_load_state()
263 env->spr[SPR_PPR] = load->ppr; in nested_load_state()
473 hsrr0 = env->spr[SPR_HSRR0]; in spapr_exit_nested_hv()
474 hsrr1 = env->spr[SPR_HSRR1]; in spapr_exit_nested_hv()
475 hdar = env->spr[SPR_HDAR]; in spapr_exit_nested_hv()
[all …]
H A Dppc_booke.c81 (env->spr[SPR_BOOKE_TSR] & TSR_DIS in booke_update_irq()
82 && env->spr[SPR_BOOKE_TCR] & TCR_DIE)); in booke_update_irq()
85 (env->spr[SPR_BOOKE_TSR] & TSR_WIS in booke_update_irq()
89 (env->spr[SPR_BOOKE_TSR] & TSR_FIS in booke_update_irq()
141 if (!(env->spr[SPR_BOOKE_TSR] & tsr_bit)) { in booke_update_fixed_timer()
195 env->spr[SPR_BOOKE_TSR] |= TSR_DIS; in booke_decr_cb()
198 if (env->spr[SPR_BOOKE_TCR] & TCR_ARE) { in booke_decr_cb()
201 if (env->spr[SPR_BOOKE_DECAR] != 0) { in booke_decr_cb()
217 env->spr[SPR_BOOKE_TSR] |= TSR_FIS; in booke_fit_cb()
255 env->spr[SPR_BOOKE_TSR] &= ~val; in store_booke_tsr()
[all …]
H A Dppc.c287 dbsr = env->spr[SPR_40x_DBSR]; in ppc40x_core_reset()
290 env->spr[SPR_40x_DBSR] = dbsr; in ppc40x_core_reset()
301 dbsr = env->spr[SPR_40x_DBSR]; in ppc40x_chip_reset()
304 env->spr[SPR_40x_DBSR] = dbsr; in ppc40x_chip_reset()
522 return env->spr[SPR_TBL]; in cpu_ppc_load_tbl()
547 return env->spr[SPR_TBU]; in cpu_ppc_load_tbu()
765 return env->spr[SPR_DECR]; in cpu_ppc_load_decr()
1217 env->spr[SPR_40x_TCR], env->spr[SPR_40x_TSR]); in cpu_4xx_fit_cb()
1264 env->spr[SPR_40x_TCR], env->spr[SPR_40x_TSR], in cpu_4xx_pit_cb()
1298 trace_ppc4xx_wdt(env->spr[SPR_40x_TCR], env->spr[SPR_40x_TSR]); in cpu_4xx_wdt_cb()
[all …]
/openbmc/linux/arch/powerpc/xmon/
H A Dspr_access.S34 spr = 0 define
36 mfspr r3, spr
38 spr = spr + 1 define
42 spr = 0 define
44 mtspr spr, r4
46 spr = spr + 1 define
/openbmc/qemu/target/openrisc/
H A Dsys_helper.c52 switch (spr) { in HELPER()
63 switch (spr) { in HELPER()
96 idx = (spr - 1024); in HELPER()
101 idx = spr - TO_SPR(1, 512); in HELPER()
112 idx = spr - TO_SPR(1, 640); in HELPER()
124 idx = spr - TO_SPR(2, 512); in HELPER()
135 idx = spr - TO_SPR(2, 640); in HELPER()
227 switch (spr) { in HELPER()
237 switch (spr) { in HELPER()
295 idx = (spr - 1024); in HELPER()
[all …]
/openbmc/linux/drivers/gpu/drm/ci/
H A Dtestlist.txt2131 kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move
2132 kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff
2135 kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-move
2136 kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff
2139 kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-move
2140 kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff
2143 kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move
2144 kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-onoff
2147 kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-move
2148 kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-onoff
[all …]
/openbmc/openbmc/poky/meta/recipes-devtools/valgrind/valgrind/
H A DAdded-support-for-PPC-instructions-mfatbu-mfatbl.patch46 + UInt spr;
48 + __asm__ __volatile__("mfspr %0,527" : "=b"(spr));
50 + __asm__ __volatile__("mfspr %0,526" : "=b"(spr));
52 + return spr;

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