Home
last modified time | relevance | path

Searched refs:socfpga_ecc_hmc_base (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/drivers/ddr/altera/
H A Dsdram_arria10.c44 static const struct socfpga_ecc_hmc *socfpga_ecc_hmc_base = variable
169 ret = wait_for_bit_le32(&socfpga_ecc_hmc_base->ddrcalstat, in ddr_setup()
185 return !!(readl(&socfpga_ecc_hmc_base->eccctrl) & in sdram_is_ecc_enabled()
235 size *= (2 << (readl(&socfpga_ecc_hmc_base->ddrioctrl) & in sdram_size_calc()
275 &socfpga_ecc_hmc_base->ddrioctrl); in sdram_mmr_init()
278 ddrioctl = readl(&socfpga_ecc_hmc_base->ddrioctrl); in sdram_mmr_init()
424 setbits_le32(&socfpga_ecc_hmc_base->eccctrl, in sdram_mmr_init()
428 clrbits_le32(&socfpga_ecc_hmc_base->eccctrl, in sdram_mmr_init()
431 setbits_le32(&socfpga_ecc_hmc_base->eccctrl2, in sdram_mmr_init()
435 clrbits_le32(&socfpga_ecc_hmc_base->eccctrl, in sdram_mmr_init()
[all …]