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Searched refs:soc_con2 (Results 1 – 11 of 11) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dgrf_rk3036.h39 unsigned int soc_con2; member
H A Dgrf_rk3188.h40 u32 soc_con2; member
H A Dgrf_rk3368.h62 u32 soc_con2; member
H A Dgrf_rv1108.h67 u32 soc_con2; member
H A Dgrf_rk3288.h60 u32 soc_con2; member
102 u32 soc_con2; member
H A Dgrf_rk3128.h43 unsigned int soc_con2; member
H A Dgrf_rk3399.h160 u32 soc_con2; member
/openbmc/u-boot/drivers/ram/rockchip/
H A Dsdram_rk3288.c231 rk_clrsetreg(&grf->soc_con2, mask, in ddr_set_en_bst_odt()
614 rk_clrsetreg(&dram->sgrf->soc_con2, 0x1f, sdram_params->base.stride); in dram_all_config()
811 rk_clrsetreg(&dram->sgrf->soc_con2, 0x1f, 0x17); in sdram_init()
813 rk_clrsetreg(&dram->sgrf->soc_con2, 0x1f, 0x1a); in sdram_init()
H A Dsdram_rk3188.c214 rk_clrsetreg(&grf->soc_con2, mask, val); in ddr_set_ddr3_mode()
223 rk_clrsetreg(&grf->soc_con2, mask, val); in ddr_rank_2_row15en()
/openbmc/u-boot/doc/device-tree-bindings/clock/
H A Drockchip,rk3288-dmc.txt109 stride - stride value for soc_con2 register
/openbmc/u-boot/arch/arm/mach-rockchip/rk3036/
H A Dsdram_rk3036.c620 writel(RK_SETBITS(MSCH4_MAINDDR3), &priv->grf->soc_con2); in pctl_cfg()