Home
last modified time | relevance | path

Searched refs:shifted (Results 1 – 25 of 80) sorted by relevance

1234

/openbmc/linux/net/sunrpc/auth_gss/
H A Dgss_krb5_wrap.c74 int shifted = 0; in _rotate_left() local
78 while (shifted < shift) { in _rotate_left()
79 this_shift = min(shift - shifted, LOCAL_BUF_LEN); in _rotate_left()
81 shifted += this_shift; in _rotate_left()
/openbmc/linux/arch/arm/nwfpe/
H A Dsoftfloat-macros35 bits are shifted off, they are ``jammed'' into the least significant bit of
60 bits are shifted off, they are ``jammed'' into the least significant bit of
88 _plus_ the number of bits given in `count'. The shifted result is at most
90 bits shifted off form a second 64-bit result as follows: The _last_ bit
91 shifted off is the most-significant bit of the extra result, and the other
97 value is shifted right by the number of bits given in `count', and the
135 number of bits given in `count'. Any bits shifted off are lost. The value
212 by 64 _plus_ the number of bits given in `count'. The shifted result is
215 off form a third 64-bit result as follows: The _last_ bit shifted off is
222 fixed-point value is shifted right by the number of bits given in `count',
[all …]
/openbmc/u-boot/doc/device-tree-bindings/exynos/
H A Ddwmmc.txt33 . SelClk_sample: Select sample clock among 8 shifted clocks.
34 . SelClk_drv: Select drv clock among 8 shifted clocks.
/openbmc/linux/Documentation/devicetree/bindings/i3c/
H A Di3c.yaml125 Contains the manufacturer ID left-shifted by 1.
130 Contains the ORing of the part ID left-shifted by 16,
131 the instance ID left-shifted by 12 and extra information.
/openbmc/linux/Documentation/devicetree/bindings/rtc/
H A Depson,rx6110.txt28 - spi-cpha: RX6110 works with SPI shifted clock phase
H A Drtc.yaml39 shifted so the first usable year is the specified one.
/openbmc/linux/Documentation/driver-api/
H A Dspi.rst9 duplex protocol; for each bit shifted out the MOSI line (one per clock)
10 another is shifted in on the MISO line. Those bits are assembled into
/openbmc/linux/drivers/media/rc/
H A Dserial_ir.c181 unsigned char chunk, shifted; in send_pulse_irdeo() local
190 shifted = chunk << (i * 3); in send_pulse_irdeo()
191 shifted >>= 1; in send_pulse_irdeo()
192 output &= (~shifted); in send_pulse_irdeo()
/openbmc/linux/arch/arm/mm/
H A Dcache-v7.S51 mov r3, r3, lsl r1 @ NumWays-1 shifted into bits [31:...]
52 movs r1, r2, lsl r1 @ #1 shifted left by same amount
157 movne r4, r4, lsl r5 @ # of ways shifted into bits [31:...]
158 movne r6, r6, lsl r5 @ 1 shifted left by same amount
/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-driver-hid-prodikeys26 The octave can be shifted via software up/down 2 octaves.
/openbmc/qemu/host/include/generic/host/
H A Dstore-insert-al16.h.inc14 * @val: shifted value to store
/openbmc/linux/Documentation/devicetree/bindings/bus/
H A Dmoxtet.txt8 - spi-cpha : Required shifted clock phase
/openbmc/qemu/host/include/aarch64/host/
H A Dstore-insert-al16.h.inc14 * @val: shifted value to store
/openbmc/linux/arch/m68k/fpsp040/
H A Dsgetem.S109 | shifted bits in d0 and d1
134 | ;be shifted into ms mant
/openbmc/linux/sound/soc/cirrus/
H A DKconfig25 state machine and the whole stream can be shifted by one byte
/openbmc/linux/arch/powerpc/lib/
H A Ddiv64.S39 divwu r11,r11,r9 # then we divide the shifted quantities
/openbmc/linux/Documentation/i2c/
H A Dslave-interface.rst113 only means that the previous byte is shifted out to the bus! To ensure seamless
115 still shifted out. If the master sends NACK and stops reading after the byte
116 currently shifted out, this byte requested here is never used. It very likely
/openbmc/linux/arch/sh/kernel/
H A Dentry-common.S262 * Note: When we're first called, the TRA value must be shifted
/openbmc/linux/Documentation/devicetree/bindings/mux/
H A Dreg-mux.yaml32 - description: pre-shifted bitfield mask
/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Dopencores,i2c-ocores.yaml59 device register offsets are shifted by this value
/openbmc/linux/Documentation/driver-api/media/drivers/
H A Dcx88-devel.rst88 Bits are then right shifted into the GP_SAMPLE register at the specified
/openbmc/u-boot/doc/device-tree-bindings/serial/
H A Dsnps-dw-apb-uart.txt23 not present then the register offsets are not shifted.
/openbmc/linux/arch/powerpc/boot/
H A Ddiv64.S39 divwu r11,r11,r9 # then we divide the shifted quantities
/openbmc/linux/Documentation/devicetree/bindings/spi/
H A Dspi-controller.yaml108 The device requires shifted clock phase (CPHA) mode.
/openbmc/linux/Documentation/input/devices/
H A Drotary-encoder.rst11 peripherals with two wires. The outputs are phase-shifted by 90 degrees

1234