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Searched refs:shaper (Results 1 – 17 of 17) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_resource.h88 struct dc_transfer_func **shaper);
94 struct dc_transfer_func **shaper);
H A Ddcn30_resource.c1434 struct dc_transfer_func **shaper) in dcn30_acquire_post_bldn_3dlut() argument
1440 ASSERT(*lut == NULL && *shaper == NULL); in dcn30_acquire_post_bldn_3dlut()
1442 *shaper = NULL; in dcn30_acquire_post_bldn_3dlut()
1447 *shaper = pool->mpc_shaper[i]; in dcn30_acquire_post_bldn_3dlut()
1469 struct dc_transfer_func **shaper) in dcn30_release_post_bldn_3dlut() argument
1475 if (pool->mpc_lut[i] == *lut && pool->mpc_shaper[i] == *shaper) { in dcn30_release_post_bldn_3dlut()
1479 *shaper = NULL; in dcn30_release_post_bldn_3dlut()
/openbmc/linux/net/sched/
H A Dsch_mqprio.c26 u16 shaper; member
48 if (priv->shaper != TC_MQPRIO_SHAPER_DCB) in mqprio_enable_offload()
56 mqprio.shaper = priv->shaper; in mqprio_enable_offload()
276 priv->shaper = nla_get_u16(tb[TCA_MQPRIO_SHAPER]); in mqprio_parse_nlattr()
280 if (priv->shaper != TC_MQPRIO_SHAPER_BW_RATE) { in mqprio_parse_nlattr()
309 if (priv->shaper != TC_MQPRIO_SHAPER_BW_RATE) { in mqprio_parse_nlattr()
597 nla_put_u16(skb, TCA_MQPRIO_SHAPER, priv->shaper)) in mqprio_dump()
/openbmc/openbmc/meta-openembedded/meta-initramfs/recipes-kernel/kexec/kexec-tools-klibc/
H A D0002-Adjust-the-order-of-headers-to-fix-build-for-musl.patch29 * First, we find all shaper devices and down them. Then we
H A D0014-add-if_nameindex-from-musl.patch152 * First, we find all shaper devices and down them. Then we
/openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/
H A Dcore_types.h173 struct dc_transfer_func **shaper);
179 struct dc_transfer_func **shaper);
/openbmc/linux/include/net/
H A Dpkt_sched.h173 u16 shaper; member
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_resource.c1592 struct dc_transfer_func **shaper) in dcn32_acquire_post_bldn_3dlut() argument
1596 ASSERT(*lut == NULL && *shaper == NULL); in dcn32_acquire_post_bldn_3dlut()
1598 *shaper = NULL; in dcn32_acquire_post_bldn_3dlut()
1602 *shaper = pool->mpc_shaper[mpcc_id]; in dcn32_acquire_post_bldn_3dlut()
1613 struct dc_transfer_func **shaper) in dcn32_release_post_bldn_3dlut() argument
1619 if (pool->mpc_lut[i] == *lut && pool->mpc_shaper[i] == *shaper) { in dcn32_release_post_bldn_3dlut()
1623 *shaper = NULL; in dcn32_release_post_bldn_3dlut()
H A Ddcn32_resource.h76 struct dc_transfer_func **shaper);
82 struct dc_transfer_func **shaper);
/openbmc/linux/Documentation/networking/device_drivers/ethernet/intel/
H A Diavf.rst156 The shaper bw_rlimit parameter is optional.
164 queues 16@0 16@16 hw 1 mode channel shaper bw_rlimit min_rate 1Gbit 2Gbit
178 shaper bw_rlimit: for each tc, sets minimum and maximum bandwidth rates.
H A Di40e.rst665 The shaper bw_rlimit parameter is optional.
673 queues 16@0 16@16 hw 1 mode channel shaper bw_rlimit min_rate 1Gbit 2Gbit
687 shaper bw_rlimit: for each tc, sets minimum and maximum bandwidth rates.
/openbmc/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dcxgb4_tc_mqprio.c28 } else if (mqprio->shaper != TC_MQPRIO_SHAPER_BW_RATE) { in cxgb4_mqprio_validate()
/openbmc/linux/Documentation/networking/device_drivers/ethernet/ti/
H A Dcpsw.rst77 - S - shaper configured
/openbmc/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc.h1400 struct dc_transfer_func **shaper);
/openbmc/linux/drivers/net/dsa/microchip/
H A Dksz_common.c3154 u8 shaper) in ksz_setup_tc_mode() argument
3158 FIELD_PREP(MTI_SHAPING_M, shaper)); in ksz_setup_tc_mode()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc.c2102 struct dc_transfer_func **shaper) in dc_acquire_release_mpc_3dlut() argument
2126 ret = pool->funcs->acquire_post_bldn_3dlut(res_ctx, pool, mpcc_id, lut, shaper); in dc_acquire_release_mpc_3dlut()
2128 ret = pool->funcs->release_post_bldn_3dlut(res_ctx, pool, lut, shaper); in dc_acquire_release_mpc_3dlut()
/openbmc/linux/drivers/net/ethernet/marvell/
H A Dmvneta.c5256 if (mqprio->shaper != TC_MQPRIO_SHAPER_BW_RATE) { in mvneta_setup_mqprio()