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Searched refs:serdes1_cfg_tbl (Results 1 – 24 of 24) sorted by relevance

/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dp1021_serdes.c34 static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { variable
65 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
71 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
85 if ((serdes1_cfg_tbl[srds_cfg][1] == PCIE1) || in fsl_serdes_init()
86 (serdes1_cfg_tbl[srds_cfg][1] == PCIE2)) { in fsl_serdes_init()
H A Dp1023_serdes.c17 static const u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { variable
48 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
53 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
H A Dc29x_serdes.c21 static const struct serdes_config serdes1_cfg_tbl[] = { variable
54 if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
59 ptr = &serdes1_cfg_tbl[srds_cfg]; in fsl_serdes_init()
H A Dmpc8548_serdes.c16 static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { variable
45 if (srds1_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
51 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds1_cfg][lane]; in fsl_serdes_init()
H A Dmpc8568_serdes.c16 static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { variable
45 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
51 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
H A Dp2020_serdes.c16 static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { variable
53 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
59 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
H A Dmpc8569_serdes.c16 static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { variable
54 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
60 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
H A Dp1010_serdes.c18 static const u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { variable
65 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
70 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
H A Dmpc8572_serdes.c16 static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { variable
49 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
55 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
H A Dmpc8544_serdes.c17 static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { variable
66 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
71 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
H A Dp1022_serdes.c18 static const u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { variable
104 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
109 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
H A Dbsc9132_serdes.c17 static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { variable
89 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
95 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
H A Dmpc8536_serdes.c57 static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { variable
226 if (srds1_io_sel >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
231 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds1_io_sel][lane]; in fsl_serdes_init()
H A Db4860_serdes.c18 static struct serdes_config serdes1_cfg_tbl[] = { variable
183 static struct serdes_config serdes1_cfg_tbl[] = { variable
240 serdes1_cfg_tbl,
H A Dt2080_serdes.c18 static const struct serdes_config serdes1_cfg_tbl[] = { variable
182 serdes1_cfg_tbl,
H A Dt4240_serdes.c18 static const struct serdes_config serdes1_cfg_tbl[] = { variable
266 static const struct serdes_config serdes1_cfg_tbl[] = { variable
471 serdes1_cfg_tbl,
/openbmc/u-boot/arch/powerpc/cpu/mpc86xx/
H A Dmpc8610_serdes.c17 static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { variable
62 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
67 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
H A Dmpc8641_serdes.c17 static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { variable
71 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
76 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
/openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
H A Dls1012a_serdes.c15 static struct serdes_config serdes1_cfg_tbl[] = { variable
29 serdes1_cfg_tbl,
H A Dls1043a_serdes.c15 static struct serdes_config serdes1_cfg_tbl[] = { variable
41 serdes1_cfg_tbl,
H A Dls1046a_serdes.c15 static struct serdes_config serdes1_cfg_tbl[] = { variable
53 serdes1_cfg_tbl,
H A Dls1088a_serdes.c15 static struct serdes_config serdes1_cfg_tbl[] = { variable
47 serdes1_cfg_tbl,
H A Dlx2160a_serdes.c14 static struct serdes_config serdes1_cfg_tbl[] = { variable
86 serdes1_cfg_tbl,
H A Dls2080a_serdes.c14 static struct serdes_config serdes1_cfg_tbl[] = { variable
78 serdes1_cfg_tbl,