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Searched refs:sdx5_inst_rmw (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/phy/microchip/
H A Dsparx5_serdes.c948 sdx5_inst_rmw(SD_CMU_CFG_SD_CMU_CFG_EXT_CFG_RST_SET(1), in sparx5_cmu_apply_cfg()
953 sdx5_inst_rmw(SD_CMU_CFG_SD_CMU_CFG_EXT_CFG_RST_SET(0), in sparx5_cmu_apply_cfg()
958 sdx5_inst_rmw(SD_CMU_CFG_SD_CMU_CFG_CMU_RST_SET(1), in sparx5_cmu_apply_cfg()
963 sdx5_inst_rmw(SD_CMU_CMU_45_R_DWIDTHCTRL_FROM_HWT_SET(0x1) | in sparx5_cmu_apply_cfg()
976 sdx5_inst_rmw(SD_CMU_CMU_47_R_PCS2PMA_PHYMODE_4_0_SET(0), in sparx5_cmu_apply_cfg()
981 sdx5_inst_rmw(SD_CMU_CMU_1B_CFG_RESERVE_7_0_SET(0), in sparx5_cmu_apply_cfg()
986 sdx5_inst_rmw(SD_CMU_CMU_0D_CFG_JC_BYP_SET(0x1), in sparx5_cmu_apply_cfg()
991 sdx5_inst_rmw(SD_CMU_CMU_1F_CFG_VTUNE_SEL_SET(1), in sparx5_cmu_apply_cfg()
996 sdx5_inst_rmw(SD_CMU_CMU_00_CFG_PLL_TP_SEL_1_0_SET(3), in sparx5_cmu_apply_cfg()
1001 sdx5_inst_rmw(SD_CMU_CMU_05_CFG_BIAS_TP_SEL_1_0_SET(3), in sparx5_cmu_apply_cfg()
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H A Dsparx5_serdes.h93 static inline void sdx5_inst_rmw(u32 val, u32 mask, void __iomem *iomem, in sdx5_inst_rmw() function