/openbmc/u-boot/drivers/ddr/fsl/ |
H A D | mpc85xx_ddr_gen3.c | 152 out_be32(&ddr->sdram_cfg_2, in fsl_ddr_set_memctl_regs() 163 out_be32(&ddr->sdram_cfg_2, regs->ddr_sdram_cfg_2); in fsl_ddr_set_memctl_regs() 332 out_be32(&ddr->sdram_cfg_2, regs->ddr_sdram_cfg_2); in fsl_ddr_set_memctl_regs() 364 setbits_be32(&ddr->sdram_cfg_2, SDRAM_CFG2_D_INIT); in fsl_ddr_set_memctl_regs() 366 in_be32(&ddr->sdram_cfg_2)); in fsl_ddr_set_memctl_regs() 386 setbits_be32(&ddr->sdram_cfg_2, SDRAM_CFG2_FRC_SR); in fsl_ddr_set_memctl_regs() 450 clrbits_be32(&ddr->sdram_cfg_2, SDRAM_CFG2_ODT_CFG_MASK); in fsl_ddr_set_memctl_regs() 452 in_be32(&ddr->sdram_cfg_2)); in fsl_ddr_set_memctl_regs() 484 setbits_be32(&ddr->sdram_cfg_2, in fsl_ddr_set_memctl_regs() 502 setbits_be32(&ddr->sdram_cfg_2, in fsl_ddr_set_memctl_regs() [all …]
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H A D | arm_ddr_gen3.c | 129 ddr_out32(&ddr->sdram_cfg_2, in fsl_ddr_set_memctl_regs() 140 ddr_out32(&ddr->sdram_cfg_2, regs->ddr_sdram_cfg_2); in fsl_ddr_set_memctl_regs() 186 temp_sdram_cfg = ddr_in32(&ddr->sdram_cfg_2); in fsl_ddr_set_memctl_regs() 188 ddr_out32(&ddr->sdram_cfg_2, temp_sdram_cfg); in fsl_ddr_set_memctl_regs() 231 while ((ddr_in32(&ddr->sdram_cfg_2) & SDRAM_CFG2_D_INIT) && in fsl_ddr_set_memctl_regs() 242 temp_sdram_cfg = ddr_in32(&ddr->sdram_cfg_2); in fsl_ddr_set_memctl_regs() 244 ddr_out32(&ddr->sdram_cfg_2, temp_sdram_cfg); in fsl_ddr_set_memctl_regs()
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H A D | fsl_ddr_gen4.c | 217 ddr_out32(&ddr->sdram_cfg_2, in fsl_ddr_set_memctl_regs() 228 ddr_out32(&ddr->sdram_cfg_2, regs->ddr_sdram_cfg_2); in fsl_ddr_set_memctl_regs() 281 ddr_out32(&ddr->sdram_cfg_2, in fsl_ddr_set_memctl_regs() 331 temp32 = ddr_in32(&ddr->sdram_cfg_2); in fsl_ddr_set_memctl_regs() 333 ddr_out32(&ddr->sdram_cfg_2, temp32); in fsl_ddr_set_memctl_regs() 434 ddr_out32(&ddr->sdram_cfg_2, regs->ddr_sdram_cfg_2); in fsl_ddr_set_memctl_regs() 466 while ((ddr_in32(&ddr->sdram_cfg_2) & SDRAM_CFG2_D_INIT) && in fsl_ddr_set_memctl_regs() 497 temp32 = ddr_in32(&ddr->sdram_cfg_2); in fsl_ddr_set_memctl_regs() 499 ddr_out32(&ddr->sdram_cfg_2, temp32); in fsl_ddr_set_memctl_regs()
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H A D | mpc86xx_ddr.c | 55 out_be32(&ddr->sdram_cfg_2, regs->ddr_sdram_cfg_2); in fsl_ddr_set_memctl_regs() 79 while (in_be32(&ddr->sdram_cfg_2) & 0x10) { in fsl_ddr_set_memctl_regs()
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H A D | mpc85xx_ddr_gen2.c | 70 out_be32(&ddr->sdram_cfg_2, regs->ddr_sdram_cfg_2); in fsl_ddr_set_memctl_regs() 90 while (in_be32(&ddr->sdram_cfg_2) & 0x10) { in fsl_ddr_set_memctl_regs()
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/openbmc/u-boot/board/freescale/ls1021atwr/ |
H A D | ls1021atwr.c | 157 out_be32(&ddr->sdram_cfg_2, in ddrmc_init() 168 out_be32(&ddr->sdram_cfg_2, DDR_SDRAM_CFG_2); in ddrmc_init() 198 temp_sdram_cfg = in_be32(&ddr->sdram_cfg_2); in ddrmc_init() 200 out_be32(&ddr->sdram_cfg_2, temp_sdram_cfg); in ddrmc_init() 212 temp_sdram_cfg = in_be32(&ddr->sdram_cfg_2); in ddrmc_init() 214 out_be32(&ddr->sdram_cfg_2, temp_sdram_cfg); in ddrmc_init()
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/openbmc/u-boot/board/freescale/bsc9132qds/ |
H A D | spl_minimal.c | 25 __raw_writel(CONFIG_SYS_DDR_CONTROL_2_800, &ddr->sdram_cfg_2); in sdram_init() 45 __raw_writel(CONFIG_SYS_DDR_CONTROL_2_1333, &ddr->sdram_cfg_2); in sdram_init()
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/openbmc/u-boot/board/freescale/mpc8572ds/ |
H A D | mpc8572ds.c | 79 ddr->sdram_cfg_2 = CONFIG_SYS_DDR_CONTROL2; in fixed_sdram() 99 while ((ddr->sdram_cfg_2 & (d_init << 4)) != 0) { in fixed_sdram()
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/openbmc/u-boot/board/sbc8641d/ |
H A D | sbc8641d.c | 114 ddr->sdram_cfg_2 = CONFIG_SYS_DDR_CFG_2; in fixed_sdram() 145 ddr->sdram_cfg_2 = CONFIG_SYS_DDR2_CFG_2; in fixed_sdram()
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/openbmc/u-boot/board/freescale/mpc8569mds/ |
H A D | mpc8569mds.c | 245 out_be32(&ddr->sdram_cfg_2, CONFIG_SYS_DDR_SDRAM_CFG_2); in fixed_sdram() 255 out_be32(&ddr->sdram_cfg_2, CONFIG_SYS_DDR_SDRAM_CFG_2); in fixed_sdram() 271 while ((ddr->sdram_cfg_2 & (d_init << 4)) != 0) { in fixed_sdram()
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/openbmc/u-boot/board/freescale/mpc8536ds/ |
H A D | mpc8536ds.c | 107 ddr->sdram_cfg_2 = CONFIG_SYS_DDR_CONTROL2; in fixed_sdram() 127 while ((ddr->sdram_cfg_2 & (d_init << 4)) != 0) { in fixed_sdram()
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/openbmc/u-boot/board/freescale/mpc8610hpcd/ |
H A D | mpc8610hpcd.c | 163 ddr->sdram_cfg_2 = 0x04400010; in fixed_sdram() 184 while ((ddr->sdram_cfg_2 & (d_init << 4)) != 0) in fixed_sdram()
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/openbmc/u-boot/board/socrates/ |
H A D | sdram.c | 42 ddr->sdram_cfg_2 = CONFIG_SYS_DDR_CONFIG_2; in fixed_sdram()
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/openbmc/u-boot/board/sbc8548/ |
H A D | ddr.c | 110 out_be32(&ddr->sdram_cfg_2, 0x24401000); in fixed_sdram()
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/openbmc/u-boot/board/freescale/bsc9131rdb/ |
H A D | spl_minimal.c | 36 __raw_writel(CONFIG_SYS_DDR_CONTROL_2, &ddr->sdram_cfg_2); in sdram_init()
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/openbmc/u-boot/board/freescale/mpc8641hpcn/ |
H A D | mpc8641hpcn.c | 98 ddr->sdram_cfg_2 = CONFIG_SYS_DDR_CONTROL2; in fixed_sdram()
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/openbmc/u-boot/board/freescale/ls1021aiot/ |
H A D | ls1021aiot.c | 63 out_be32(&ddr->sdram_cfg_2, DDR_SDRAM_CFG_2); in ddrmc_init()
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/openbmc/u-boot/arch/arm/cpu/armv7/ls102xa/ |
H A D | ls102xa_psci.c | 123 setbits_be32(&ddr->sdram_cfg_2, 0x80000000); in ls1_start_fsm()
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/openbmc/u-boot/include/ |
H A D | fsl_immap.h | 38 u32 sdram_cfg_2; /* SDRAM Control Configuration 2 */ member
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