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Searched refs:sc (Results 1 – 25 of 130) sorted by relevance

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/openbmc/qemu/hw/tricore/
H A Dtc27x_soc.c103 TC27XSoCClass *sc = TC27X_SOC_GET_CLASS(s); in tc27x_soc_init_memory_mapping() local
106 sc->memmap[TC27XD_DSPR0].base, sc->memmap[TC27XD_DSPR0].size); in tc27x_soc_init_memory_mapping()
108 sc->memmap[TC27XD_PSPR0].base, sc->memmap[TC27XD_PSPR0].size); in tc27x_soc_init_memory_mapping()
110 sc->memmap[TC27XD_DSPR1].base, sc->memmap[TC27XD_DSPR1].size); in tc27x_soc_init_memory_mapping()
112 sc->memmap[TC27XD_PSPR1].base, sc->memmap[TC27XD_PSPR1].size); in tc27x_soc_init_memory_mapping()
114 sc->memmap[TC27XD_DSPR2].base, sc->memmap[TC27XD_DSPR2].size); in tc27x_soc_init_memory_mapping()
116 sc->memmap[TC27XD_PSPR2].base, sc->memmap[TC27XD_PSPR2].size); in tc27x_soc_init_memory_mapping()
120 sc->memmap[TC27XD_DCACHE2].base, sc->memmap[TC27XD_DCACHE2].size); in tc27x_soc_init_memory_mapping()
122 sc->memmap[TC27XD_DTAG2].base, sc->memmap[TC27XD_DTAG2].size); in tc27x_soc_init_memory_mapping()
124 sc->memmap[TC27XD_PCACHE2].base, sc->memmap[TC27XD_PCACHE2].size); in tc27x_soc_init_memory_mapping()
[all …]
/openbmc/qemu/linux-user/hexagon/
H A Dsignal.c77 static void setup_sigcontext(struct target_sigcontext *sc, CPUHexagonState *env) in setup_sigcontext() argument
79 __put_user(env->gpr[HEX_REG_R00], &sc->r0); in setup_sigcontext()
80 __put_user(env->gpr[HEX_REG_R01], &sc->r1); in setup_sigcontext()
81 __put_user(env->gpr[HEX_REG_R02], &sc->r2); in setup_sigcontext()
82 __put_user(env->gpr[HEX_REG_R03], &sc->r3); in setup_sigcontext()
83 __put_user(env->gpr[HEX_REG_R04], &sc->r4); in setup_sigcontext()
84 __put_user(env->gpr[HEX_REG_R05], &sc->r5); in setup_sigcontext()
85 __put_user(env->gpr[HEX_REG_R06], &sc->r6); in setup_sigcontext()
86 __put_user(env->gpr[HEX_REG_R07], &sc->r7); in setup_sigcontext()
87 __put_user(env->gpr[HEX_REG_R08], &sc->r8); in setup_sigcontext()
[all …]
/openbmc/qemu/linux-user/microblaze/
H A Dsignal.c51 static void setup_sigcontext(struct target_sigcontext *sc, CPUMBState *env) in setup_sigcontext() argument
53 __put_user(env->regs[0], &sc->regs.r0); in setup_sigcontext()
54 __put_user(env->regs[1], &sc->regs.r1); in setup_sigcontext()
55 __put_user(env->regs[2], &sc->regs.r2); in setup_sigcontext()
56 __put_user(env->regs[3], &sc->regs.r3); in setup_sigcontext()
57 __put_user(env->regs[4], &sc->regs.r4); in setup_sigcontext()
58 __put_user(env->regs[5], &sc->regs.r5); in setup_sigcontext()
59 __put_user(env->regs[6], &sc->regs.r6); in setup_sigcontext()
60 __put_user(env->regs[7], &sc->regs.r7); in setup_sigcontext()
61 __put_user(env->regs[8], &sc->regs.r8); in setup_sigcontext()
[all …]
/openbmc/qemu/hw/i386/kvm/
H A Di8254.c92 struct PITChannelState *sc; in kvm_pit_get() local
108 sc = &pit->channels[i]; in kvm_pit_get()
109 sc->count = kchan->count; in kvm_pit_get()
110 sc->latched_count = kchan->latched_count; in kvm_pit_get()
111 sc->count_latched = kchan->count_latched; in kvm_pit_get()
112 sc->status_latched = kchan->status_latched; in kvm_pit_get()
113 sc->status = kchan->status; in kvm_pit_get()
114 sc->read_state = kchan->read_state; in kvm_pit_get()
115 sc->write_state = kchan->write_state; in kvm_pit_get()
116 sc->write_latch = kchan->write_latch; in kvm_pit_get()
[all …]
/openbmc/qemu/hw/sd/
H A Dcore.c52 SDCardClass *sc = SDMMC_COMMON_GET_CLASS(slave); in sdbus_get_dat_lines() local
54 if (sc->get_dat_lines) { in sdbus_get_dat_lines()
55 dat_lines = sc->get_dat_lines(slave); in sdbus_get_dat_lines()
69 SDCardClass *sc = SDMMC_COMMON_GET_CLASS(slave); in sdbus_get_cmd_line() local
71 if (sc->get_cmd_line) { in sdbus_get_cmd_line()
72 cmd_line = sc->get_cmd_line(slave); in sdbus_get_cmd_line()
86 SDCardClass *sc = SDMMC_COMMON_GET_CLASS(card); in sdbus_set_voltage() local
88 assert(sc->set_voltage); in sdbus_set_voltage()
89 sc->set_voltage(card, millivolts); in sdbus_set_voltage()
100 SDCardClass *sc = SDMMC_COMMON_GET_CLASS(card); in sdbus_do_command() local
[all …]
/openbmc/qemu/hw/arm/
H A Daspeed_ast2400.c143 AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s); in aspeed_soc_ast2400_get_irq() local
145 return qdev_get_gpio_in(DEVICE(&a->vic), sc->irqmap[dev]); in aspeed_soc_ast2400_get_irq()
152 AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s); in aspeed_ast2400_soc_init() local
161 for (i = 0; i < sc->num_cpus; i++) { in aspeed_ast2400_soc_init()
163 aspeed_soc_cpu_type(sc)); in aspeed_ast2400_soc_init()
169 sc->silicon_rev); in aspeed_ast2400_soc_init()
195 for (i = 0; i < sc->spis_num; i++) { in aspeed_ast2400_soc_init()
200 for (i = 0; i < sc->ehcis_num; i++) { in aspeed_ast2400_soc_init()
210 for (i = 0; i < sc->wdts_num; i++) { in aspeed_ast2400_soc_init()
215 for (i = 0; i < sc->macs_num; i++) { in aspeed_ast2400_soc_init()
[all …]
H A Daspeed_ast10x0.c105 AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s); in aspeed_soc_ast1030_get_irq() local
107 return qdev_get_gpio_in(DEVICE(&a->armv7m), sc->irqmap[dev]); in aspeed_soc_ast1030_get_irq()
114 AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s); in aspeed_soc_ast1030_init() local
129 qdev_prop_set_uint32(DEVICE(&s->scu), "silicon-rev", sc->silicon_rev); in aspeed_soc_ast1030_init()
148 for (i = 0; i < sc->spis_num; i++) { in aspeed_soc_ast1030_init()
159 for (i = 0; i < sc->wdts_num; i++) { in aspeed_soc_ast1030_init()
164 for (i = 0; i < sc->uarts_num; i++) { in aspeed_soc_ast1030_init()
192 AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s); in aspeed_soc_ast1030_realize() local
205 sc->memmap[ASPEED_DEV_IOMEM], in aspeed_soc_ast1030_realize()
208 "aspeed.sbc", sc->memmap[ASPEED_DEV_SBC], in aspeed_soc_ast1030_realize()
[all …]
H A Daspeed_ast2600.c152 AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s); in aspeed_soc_ast2600_get_irq() local
154 return qdev_get_gpio_in(DEVICE(&a->a7mpcore), sc->irqmap[dev]); in aspeed_soc_ast2600_get_irq()
161 AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s); in aspeed_soc_ast2600_init() local
170 for (i = 0; i < sc->num_cpus; i++) { in aspeed_soc_ast2600_init()
172 aspeed_soc_cpu_type(sc)); in aspeed_soc_ast2600_init()
178 sc->silicon_rev); in aspeed_soc_ast2600_init()
209 for (i = 0; i < sc->spis_num; i++) { in aspeed_soc_ast2600_init()
214 for (i = 0; i < sc->ehcis_num; i++) { in aspeed_soc_ast2600_init()
224 for (i = 0; i < sc->wdts_num; i++) { in aspeed_soc_ast2600_init()
229 for (i = 0; i < sc->macs_num; i++) { in aspeed_soc_ast2600_init()
[all …]
H A Daspeed_ast27x0.c294 AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s); in aspeed_soc_ast2700_get_irq() local
300 if (sc->irqmap[dev] == ast2700_gic_intcmap[i].irq) { in aspeed_soc_ast2700_get_irq()
309 return qdev_get_gpio_in(DEVICE(&a->gic), sc->irqmap[dev]); in aspeed_soc_ast2700_get_irq()
316 AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s); in aspeed_soc_ast2700_get_irq_index() local
322 if (sc->irqmap[dev] == ast2700_gic_intcmap[i].irq) { in aspeed_soc_ast2700_get_irq_index()
395 AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s); in aspeed_soc_ast2700_dram_init() local
417 sc->memmap[ASPEED_DEV_SDRAM] + ram_size, in aspeed_soc_ast2700_dram_init()
422 sc->memmap[ASPEED_DEV_SDRAM], &s->dram_container); in aspeed_soc_ast2700_dram_init()
432 AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s); in aspeed_soc_ast2700_init() local
441 for (i = 0; i < sc->num_cpus; i++) { in aspeed_soc_ast2700_init()
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H A Daspeed_ast27x0-tsp.c111 AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s); in aspeed_soc_ast27x0tsp_get_irq() local
118 if (sc->irqmap[dev] == ast2700_tsp_intcmap[i].irq) { in aspeed_soc_ast27x0tsp_get_irq()
127 return qdev_get_gpio_in(DEVICE(&a->armv7m), sc->irqmap[dev]); in aspeed_soc_ast27x0tsp_get_irq()
134 AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s); in aspeed_soc_ast27x0tsp_init() local
140 for (i = 0; i < sc->uarts_num; i++) { in aspeed_soc_ast27x0tsp_init()
163 AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s); in aspeed_soc_ast27x0tsp_realize() local
176 qdev_prop_set_string(armv7m, "cpu-type", aspeed_soc_cpu_type(sc)); in aspeed_soc_ast27x0tsp_realize()
200 sc->memmap[ASPEED_DEV_SDRAM], in aspeed_soc_ast27x0tsp_realize()
204 memory_region_add_subregion(s->memory, sc->memmap[ASPEED_DEV_SRAM], in aspeed_soc_ast27x0tsp_realize()
208 memory_region_add_subregion(s->memory, sc->memmap[ASPEED_DEV_SCU], in aspeed_soc_ast27x0tsp_realize()
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H A Daspeed_ast27x0-ssp.c111 AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s); in aspeed_soc_ast27x0ssp_get_irq() local
118 if (sc->irqmap[dev] == ast2700_ssp_intcmap[i].irq) { in aspeed_soc_ast27x0ssp_get_irq()
127 return qdev_get_gpio_in(DEVICE(&a->armv7m), sc->irqmap[dev]); in aspeed_soc_ast27x0ssp_get_irq()
134 AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s); in aspeed_soc_ast27x0ssp_init() local
140 for (i = 0; i < sc->uarts_num; i++) { in aspeed_soc_ast27x0ssp_init()
163 AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s); in aspeed_soc_ast27x0ssp_realize() local
176 qdev_prop_set_string(armv7m, "cpu-type", aspeed_soc_cpu_type(sc)); in aspeed_soc_ast27x0ssp_realize()
203 sc->memmap[ASPEED_DEV_SDRAM], in aspeed_soc_ast27x0ssp_realize()
207 memory_region_add_subregion(s->memory, sc->memmap[ASPEED_DEV_SRAM], in aspeed_soc_ast27x0ssp_realize()
211 memory_region_add_subregion(s->memory, sc->memmap[ASPEED_DEV_SCU], in aspeed_soc_ast27x0ssp_realize()
[all …]
H A Daspeed_soc_common.c21 const char *aspeed_soc_cpu_type(AspeedSoCClass *sc) in aspeed_soc_cpu_type() argument
23 assert(sc->valid_cpu_types); in aspeed_soc_cpu_type()
24 assert(sc->valid_cpu_types[0]); in aspeed_soc_cpu_type()
25 assert(!sc->valid_cpu_types[1]); in aspeed_soc_cpu_type()
26 return sc->valid_cpu_types[0]; in aspeed_soc_cpu_type()
36 AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s); in aspeed_soc_uart_realize() local
39 for (int i = 0, uart = sc->uarts_base; i < sc->uarts_num; i++, uart++) { in aspeed_soc_uart_realize()
45 qdev_set_legacy_instance_id(DEVICE(smm), sc->memmap[uart], 2); in aspeed_soc_uart_realize()
52 aspeed_mmio_map(s, SYS_BUS_DEVICE(smm), 0, sc->memmap[uart]); in aspeed_soc_uart_realize()
60 AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s); in aspeed_soc_uart_set_chr() local
[all …]
/openbmc/qemu/linux-user/i386/
H A Dsignal.c148 struct target_sigcontext sc; member
177 QEMU_BUILD_BUG_ON(offsetof(struct sigframe, sc.eip)
339 struct target_sigcontext *sc, in setup_sigcontext() argument
353 __put_user(env->segs[R_GS].selector, (uint32_t *)&sc->gs); in setup_sigcontext()
354 __put_user(env->segs[R_FS].selector, (uint32_t *)&sc->fs); in setup_sigcontext()
355 __put_user(env->segs[R_ES].selector, (uint32_t *)&sc->es); in setup_sigcontext()
356 __put_user(env->segs[R_DS].selector, (uint32_t *)&sc->ds); in setup_sigcontext()
357 __put_user(env->regs[R_EDI], &sc->edi); in setup_sigcontext()
358 __put_user(env->regs[R_ESI], &sc->esi); in setup_sigcontext()
359 __put_user(env->regs[R_EBP], &sc->ebp); in setup_sigcontext()
[all …]
/openbmc/qemu/linux-user/alpha/
H A Dsignal.c57 struct target_sigcontext sc; member
69 static void setup_sigcontext(struct target_sigcontext *sc, CPUAlphaState *env, in setup_sigcontext() argument
74 __put_user(on_sig_stack(frame_addr), &sc->sc_onstack); in setup_sigcontext()
75 __put_user(set->sig[0], &sc->sc_mask); in setup_sigcontext()
76 __put_user(env->pc, &sc->sc_pc); in setup_sigcontext()
77 __put_user(8, &sc->sc_ps); in setup_sigcontext()
80 __put_user(env->ir[i], &sc->sc_regs[i]); in setup_sigcontext()
82 __put_user(0, &sc->sc_regs[31]); in setup_sigcontext()
85 __put_user(env->fir[i], &sc->sc_fpregs[i]); in setup_sigcontext()
87 __put_user(0, &sc->sc_fpregs[31]); in setup_sigcontext()
[all …]
/openbmc/qemu/linux-user/include/host/sparc64/
H A Dhost-signal.h17 static inline uintptr_t host_signal_pc(host_sigcontext *sc) in host_signal_pc() argument
19 return sc->sigc_regs.tpc; in host_signal_pc()
22 static inline void host_signal_set_pc(host_sigcontext *sc, uintptr_t pc) in host_signal_set_pc() argument
24 sc->sigc_regs.tpc = pc; in host_signal_set_pc()
25 sc->sigc_regs.tnpc = pc + 4; in host_signal_set_pc()
28 static inline void *host_signal_mask(host_sigcontext *sc) in host_signal_mask() argument
30 return &sc->sigc_mask; in host_signal_mask()
/openbmc/qemu/linux-user/mips/
H A Dsignal.c104 struct target_sigcontext *sc) in setup_sigcontext() argument
108 __put_user(exception_resume_pc(regs), &sc->sc_pc); in setup_sigcontext()
111 __put_user(0, &sc->sc_regs[0]); in setup_sigcontext()
113 __put_user(regs->active_tc.gpr[i], &sc->sc_regs[i]); in setup_sigcontext()
116 __put_user(regs->active_tc.HI[0], &sc->sc_mdhi); in setup_sigcontext()
117 __put_user(regs->active_tc.LO[0], &sc->sc_mdlo); in setup_sigcontext()
121 __put_user(regs->active_tc.HI[1], &sc->sc_hi1); in setup_sigcontext()
122 __put_user(regs->active_tc.HI[2], &sc->sc_hi2); in setup_sigcontext()
123 __put_user(regs->active_tc.HI[3], &sc->sc_hi3); in setup_sigcontext()
124 __put_user(regs->active_tc.LO[1], &sc->sc_lo1); in setup_sigcontext()
[all …]
/openbmc/qemu/hw/i2c/
H A Dcore.c89 I2CSlaveClass *sc = I2C_SLAVE_GET_CLASS(candidate); in i2c_scan_bus() local
91 if (sc->match_and_add(candidate, address, broadcast, current_devs)) { in i2c_scan_bus()
124 I2CSlaveClass *sc; in i2c_do_start_transfer() local
158 sc = I2C_SLAVE_GET_CLASS(s); in i2c_do_start_transfer()
162 if (sc->event) { in i2c_do_start_transfer()
165 rv = sc->event(s, event); in i2c_do_start_transfer()
239 I2CSlaveClass *sc; in i2c_end_transfer() local
244 sc = I2C_SLAVE_GET_CLASS(s); in i2c_end_transfer()
245 if (sc->event) { in i2c_end_transfer()
247 sc->event(s, I2C_FINISH); in i2c_end_transfer()
[all …]
H A Dsmbus_slave.c49 SMBusDeviceClass *sc = SMBUS_DEVICE_GET_CLASS(dev); in smbus_do_quick_cmd() local
52 if (sc->quick_cmd) { in smbus_do_quick_cmd()
53 sc->quick_cmd(dev, recv); in smbus_do_quick_cmd()
59 SMBusDeviceClass *sc = SMBUS_DEVICE_GET_CLASS(dev); in smbus_do_write() local
62 if (sc->write_data) { in smbus_do_write()
63 sc->write_data(dev, dev->data_buf, dev->data_len); in smbus_do_write()
162 SMBusDeviceClass *sc = SMBUS_DEVICE_GET_CLASS(dev); in smbus_i2c_recv() local
167 if (sc->receive_byte) { in smbus_i2c_recv()
168 ret = sc->receive_byte(dev); in smbus_i2c_recv()
206 I2CSlaveClass *sc = I2C_SLAVE_CLASS(klass); in smbus_device_class_init() local
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/openbmc/qemu/tests/qemu-iotests/
H A D27197 unset c sc off len cmd
117 sc="${sc:-0}"
119 offset="$(($c * 64 + $sc * 2 + $off))"
157 _run_test sc=0 len=1k
161 _run_test sc=1 off=1 len=512
165 _run_test sc=2 off=1 len=1k
169 _run_test sc=3 len=2k
173 _run_test sc=4 len=6k
177 _run_test sc=7 off=1 len=4k
181 _run_test sc=16 len=1k
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/openbmc/qemu/linux-user/hppa/
H A Dsignal.c64 static void setup_sigcontext(struct target_sigcontext *sc, CPUArchState *env) in setup_sigcontext() argument
68 __put_user(env->iaoq_f, &sc->sc_iaoq[0]); in setup_sigcontext()
69 __put_user(env->iaoq_b, &sc->sc_iaoq[1]); in setup_sigcontext()
70 __put_user(0, &sc->sc_iasq[0]); in setup_sigcontext()
71 __put_user(0, &sc->sc_iasq[1]); in setup_sigcontext()
72 __put_user(0, &sc->sc_flags); in setup_sigcontext()
74 __put_user(cpu_hppa_get_psw(env), &sc->sc_gr[0]); in setup_sigcontext()
76 __put_user(env->gr[i], &sc->sc_gr[i]); in setup_sigcontext()
79 __put_user((uint64_t)env->fr0_shadow << 32, &sc->sc_fr[0]); in setup_sigcontext()
81 __put_user(env->fr[i], &sc->sc_fr[i]); in setup_sigcontext()
[all …]
/openbmc/qemu/hw/ppc/
H A Dspapr_cpu_core.c202 static void spapr_unrealize_vcpu(PowerPCCPU *cpu, SpaprCpuCore *sc) in spapr_unrealize_vcpu() argument
218 SpaprCpuCore *sc = SPAPR_CPU_CORE(dev); in spapr_cpu_core_reset() local
222 spapr_reset_vcpu(sc->threads[i]); in spapr_cpu_core_reset()
245 SpaprCpuCore *sc = SPAPR_CPU_CORE(OBJECT(dev)); in spapr_cpu_core_unrealize() local
250 if (sc->threads[i]) { in spapr_cpu_core_unrealize()
256 if (qdev_is_realized(DEVICE(sc->threads[i]))) { in spapr_cpu_core_unrealize()
257 spapr_unrealize_vcpu(sc->threads[i], sc); in spapr_cpu_core_unrealize()
259 spapr_delete_vcpu(sc->threads[i]); in spapr_cpu_core_unrealize()
262 g_free(sc->threads); in spapr_cpu_core_unrealize()
263 qemu_unregister_reset(spapr_cpu_core_reset_handler, sc); in spapr_cpu_core_unrealize()
[all …]
/openbmc/qemu/hw/intc/
H A Dloongson_ipi.c56 LoongsonIPICommonState *sc = LOONGSON_IPI_COMMON(dev); in loongson_ipi_realize() local
69 if (sc->num_cpu == 0) { in loongson_ipi_realize()
74 sc->cpu = g_new0(IPICore, sc->num_cpu); in loongson_ipi_realize()
75 for (i = 0; i < sc->num_cpu; i++) { in loongson_ipi_realize()
76 sc->cpu[i].ipi = sc; in loongson_ipi_realize()
77 qdev_init_gpio_out(dev, &sc->cpu[i].irq, 1); in loongson_ipi_realize()
80 s->ipi_mmio_mem = g_new0(MemoryRegion, sc->num_cpu); in loongson_ipi_realize()
81 for (i = 0; i < sc->num_cpu; i++) { in loongson_ipi_realize()
85 &loongson_ipi_core_ops, &sc->cpu[i], name, 0x48); in loongson_ipi_realize()
/openbmc/qemu/linux-user/arm/
H A Dsignal.c131 setup_sigcontext(struct target_sigcontext *sc, /*struct _fpstate *fpstate,*/ in setup_sigcontext() argument
134 __put_user(env->regs[0], &sc->arm_r0); in setup_sigcontext()
135 __put_user(env->regs[1], &sc->arm_r1); in setup_sigcontext()
136 __put_user(env->regs[2], &sc->arm_r2); in setup_sigcontext()
137 __put_user(env->regs[3], &sc->arm_r3); in setup_sigcontext()
138 __put_user(env->regs[4], &sc->arm_r4); in setup_sigcontext()
139 __put_user(env->regs[5], &sc->arm_r5); in setup_sigcontext()
140 __put_user(env->regs[6], &sc->arm_r6); in setup_sigcontext()
141 __put_user(env->regs[7], &sc->arm_r7); in setup_sigcontext()
142 __put_user(env->regs[8], &sc->arm_r8); in setup_sigcontext()
[all …]
/openbmc/qemu/hw/isa/
H A Dfdc37m81x-superio.c16 ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass); in fdc37m81x_class_init() local
18 sc->serial.count = 2; /* NS16C550A */ in fdc37m81x_class_init()
19 sc->parallel.count = 1; in fdc37m81x_class_init()
20 sc->floppy.count = 1; /* SMSC 82077AA Compatible */ in fdc37m81x_class_init()
21 sc->ide.count = 0; in fdc37m81x_class_init()
/openbmc/qemu/hw/timer/
H A Di8254.c78 static void pit_set_channel_gate(PITCommonState *s, PITChannelState *sc, in pit_set_channel_gate() argument
81 switch (sc->mode) { in pit_set_channel_gate()
89 if (sc->gate < val) { in pit_set_channel_gate()
91 sc->count_load_time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); in pit_set_channel_gate()
92 pit_irq_timer_update(sc, sc->count_load_time); in pit_set_channel_gate()
97 if (sc->gate < val) { in pit_set_channel_gate()
99 sc->count_load_time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); in pit_set_channel_gate()
100 pit_irq_timer_update(sc, sc->count_load_time); in pit_set_channel_gate()
105 sc->gate = val; in pit_set_channel_gate()
325 PITChannelState *sc = &s->channels[0]; in pit_post_load() local
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