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Searched refs:sar (Results 1 – 25 of 45) sorted by relevance

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/openbmc/qemu/tests/tcg/xtensa/
H A Dtest_sar.S3 test_suite sar
24 wsr a2, sar
28 rsr a3, sar
33 test sar
34 tests_sar sar
43 rsr a3, sar
58 rsr a3, sar
73 rsr a3, sar
88 rsr a3, sar
102 rsr a3, sar
H A Dtest_shift.S96 wsr a2, sar
124 wsr a2, sar
154 wsr a2, sar
185 wsr a2, sar
H A Dtest_sr.S214 test_sr sar, 1
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dfsl_dma.h38 uint sar; /* DMA source address register */ member
90 uint sar; /* DMA source address register */ member
/openbmc/qemu/linux-user/hppa/
H A Dtarget_syscall.h15 target_ulong sar; member
/openbmc/qemu/linux-user/xtensa/
H A Dtarget_syscall.h26 xtensa_reg_t sar; /* 44 */ member
/openbmc/u-boot/arch/arm/dts/
H A Drk3288-tinker.dtsi374 nuvoton,sar-threshold-num = <4>;
375 nuvoton,sar-threshold = <0xa 0x14 0x26 0x73>;
376 nuvoton,sar-hysteresis = <0>;
377 nuvoton,sar-voltage = <6>;
378 nuvoton,sar-compare-time = <0>;
379 nuvoton,sar-sampling-time = <0>;
H A Darmada-xp.dtsi147 coreclk: mvebu-sar@18230 {
/openbmc/u-boot/drivers/pwm/
H A Dpwm-imx.c45 writel(duty_cycles, &pwm->sar); in pwm_config()
/openbmc/u-boot/arch/xtensa/include/asm/
H A Dptrace.h95 unsigned long sar; /* 44 */ member
/openbmc/u-boot/drivers/dma/
H A Dfsl_dma.c101 out_dma32(&dma->sar, (u32) (src & 0xFFFFFFFF)); in dmacpy()
/openbmc/qemu/include/tcg/
H A Dtcg-opc.h84 DEF(sar, 1, 2, 0, TCG_OPF_INT)
/openbmc/qemu/target/xtensa/core-lx106/
H A Dgdb-config.c.inc40 XTREG( 17, 68, 6, 4, 4,0x0203,0x0006,-2, 2,0x1100,sar, 0,0,0,0,0,0)
/openbmc/u-boot/arch/m68k/include/asm/
H A Dimmap_5275.h107 u32 sar; member
/openbmc/u-boot/arch/arm/mach-mvebu/serdes/axp/
H A Dhigh_speed_env_lib.c171 u32 sar; in board_cpu_freq_get() local
174 sar = reg_read(MPP_SAMPLE_AT_RESET(0)); in board_cpu_freq_get()
176 return ((sar_msb & 0x100000) >> 17) | ((sar & 0xe00000) >> 21); in board_cpu_freq_get()
/openbmc/qemu/target/xtensa/core-dc232b/
H A Dgdb-config.c.inc93 XTREG(36, 144, 6, 4, 4, 0x0203, 0x0006, -2, 2, 0x1100, sar,
/openbmc/qemu/target/xtensa/core-sample_controller/
H A Dgdb-config.c.inc57 XTREG( 33,132, 6, 4, 4,0x0203,0x0006,-2, 2,0x1100,sar, 0,0,0,0,0,0)
/openbmc/u-boot/arch/arm/include/asm/arch-mx25/
H A Dimx-regs.h258 u32 sar; /* Sample Register */ member
/openbmc/u-boot/arch/arm/include/asm/arch-mx5/
H A Dimx-regs.h555 u32 sar; member
/openbmc/qemu/target/xtensa/core-dc233c/
H A Dgdb-config.c.inc61 XTREG(36, 144, 6, 4, 4, 0x0203, 0x0006, -2, 2, 0x1100, sar, 0, 0, 0, 0, 0, 0)
/openbmc/qemu/target/xtensa/core-test_mmuhifi_c3/
H A Dgdb-config.c.inc59 XTREG( 36,144, 6, 4, 4,0x0203,0x0006,-2, 2,0x1100,sar, 0,0,0,0,0,0)
/openbmc/qemu/target/xtensa/core-de212/
H A Dgdb-config.c.inc60 XTREG( 36,144, 6, 4, 4,0x0203,0x0006,-2, 2,0x1100,sar, 0,0,0,0,0,0)
/openbmc/qemu/target/xtensa/core-test_kc705_be/
H A Dgdb-config.c.inc59 XTREG( 36,144, 6, 4, 4,0x0203,0x0006,-2, 2,0x1100,sar, 0,0,0,0,0,0)
/openbmc/qemu/target/xtensa/core-de233_fpu/
H A Dgdb-config.c.inc59 XTREG( 36,144, 6, 4, 4,0x0203,0x0006,-2, 2,0x1100,sar, 0,0,0,0,0,0)
/openbmc/qemu/target/xtensa/core-fsf/
H A Dxtensa-modules.c.inc8097 { "rsr.sar", 86 /* xt_iclass_rsr.sar */,
8100 { "wsr.sar", 87 /* xt_iclass_wsr.sar */,
8103 { "xsr.sar", 88 /* xt_iclass_xsr.sar */,
8828 return 130; /* xsr.sar */
8967 return 128; /* rsr.sar */
9068 return 129; /* wsr.sar */

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