| /openbmc/linux/arch/mips/crypto/ |
| H A D | poly1305-mips.pl | 733 my ($h0,$h1,$h2,$h3,$h4, $r0,$r1,$r2,$r3, $rs1,$rs2,$rs3) =
789 lw $rs3,44($ctx)
923 maddu $rs3,$d1 # d1*s3
934 maddu $rs3,$d2 # d2*s3
944 maddu $rs3,$d3 # d3*s3
956 maddu $rs3,$h4 # h4*s3
972 multu ($rs3,$d1) # d1*s3
973 mflo ($at,$rs3,$d1)
974 mfhi ($t0,$rs3,$d1)
1010 multu ($rs3,$d2) # d2*s3
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| /openbmc/qemu/tests/tcg/tricore/asm/ |
| H A D | macros.h | 115 #define TEST_D_DDD(insn, num, result, rs1, rs2, rs3) \ argument
119 LI(DREG_RS3, rs3); \
132 #define TEST_D_DDD_PSW(insn, num, result, psw, rs1, rs2, rs3) \ argument
136 LI(DREG_RS3, rs3); \
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| H A D | test_crcn.S | 5 # insn num result rs1 rs2 rs3
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| H A D | test_dextr.S | 40 # insn num result rs1 rs2 rs3
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| /openbmc/qemu/target/riscv/insn_trans/ |
| H A D | trans_rvd.c.inc | 110 REQUIRE_EVEN(ctx, a->rd | a->rs1 | a->rs2 | a->rs3);
115 TCGv_i64 src3 = get_fpr_d(ctx, a->rs3);
128 REQUIRE_EVEN(ctx, a->rd | a->rs1 | a->rs2 | a->rs3);
133 TCGv_i64 src3 = get_fpr_d(ctx, a->rs3);
146 REQUIRE_EVEN(ctx, a->rd | a->rs1 | a->rs2 | a->rs3);
151 TCGv_i64 src3 = get_fpr_d(ctx, a->rs3);
164 REQUIRE_EVEN(ctx, a->rd | a->rs1 | a->rs2 | a->rs3);
169 TCGv_i64 src3 = get_fpr_d(ctx, a->rs3);
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| H A D | trans_rvzfh.c.inc | 95 TCGv_i64 src3 = get_fpr_hs(ctx, a->rs3);
112 TCGv_i64 src3 = get_fpr_hs(ctx, a->rs3);
129 TCGv_i64 src3 = get_fpr_hs(ctx, a->rs3);
146 TCGv_i64 src3 = get_fpr_hs(ctx, a->rs3);
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| H A D | trans_rvf.c.inc | 103 TCGv_i64 src3 = get_fpr_hs(ctx, a->rs3);
120 TCGv_i64 src3 = get_fpr_hs(ctx, a->rs3);
137 TCGv_i64 src3 = get_fpr_hs(ctx, a->rs3);
154 TCGv_i64 src3 = get_fpr_hs(ctx, a->rs3);
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| /openbmc/linux/arch/arm64/kernel/ |
| H A D | sleep.S | 39 .macro compute_mpidr_hash dst, rs0, rs1, rs2, rs3, mpidr, mask
50 lsr \mask ,\mask, \rs3
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| /openbmc/qemu/target/mips/tcg/ |
| H A D | dsp_helper.c | 1256 uint8_t rs3, rs2, rs1, rs0; \
1260 MIPSDSP_SPLIT32_8(rs, rs3, rs2, rs1, rs0); \
1263 tempD = ((uint16_t)rs3 - (uint16_t)rt3 + var) >> 1; \
1460 uint16_t rs3, rs2, rs1, rs0; \
1464 MIPSDSP_SPLIT64_16(rs, rs3, rs2, rs1, rs0); \
1475 tempB = (((int16_t)rs3 >> sa) + var) >> var; \
1577 uint16_t rs3, rs2, rs1, rs0; in helper_precrqu_s_ob_qh() local
1584 MIPSDSP_SPLIT64_16(rs, rs3, rs2, rs1, rs0); in helper_precrqu_s_ob_qh()
1587 temp[7] = mipsdsp_sat8_reduce_precision(rs3, env); in helper_precrqu_s_ob_qh()
2077 uint16_t rs3, rs2, rs1, rs0; \
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| /openbmc/qemu/target/sparc/ |
| H A D | insns.decode | 84 &r_r_r_r rd rs1 rs2 rs3
85 @r_r_r_r .. rd:5 ...... rs1:5 rs3:5 .... rs2:5 &r_r_r_r
87 &r_r_r_r rd=%dfp_rd rs1=%dfp_rs1 rs2=%dfp_rs2 rs3=%dfp_rs3
447 &r_r_r_r rd=%dfp_rd rs1=%dfp_rd rs2=%dfp_rs1 rs3=%dfp_rs2
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| H A D | translate.c | 5328 src3 = gen_load_fpr_F(dc, a->rs3); in do_ffff()
5352 src3 = gen_load_fpr_D(dc, a->rs3); in TRANS()
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| /openbmc/qemu/disas/ |
| H A D | nanomips.c | 1368 uint64 rs3 = extract_rs3_6_5_4(instruction); in BEQC_16__cond() local
1371 return rs3 < rt3 && u != 0; in BEQC_16__cond()
1377 uint64 rs3 = extract_rs3_6_5_4(instruction); in BNEC_16__cond() local
1380 return rs3 >= rt3 && u != 0; in BNEC_16__cond()
1786 const char *rs3 = GPR(decode_gpr_gpr3(rs3_value, info), info); in ADDIU_R2_() local
1788 return img_format("ADDIU %s, %s, 0x%" PRIx64, rt3, rs3, u_value); in ADDIU_R2_()
2068 const char *rs3 = GPR(decode_gpr_gpr3(rs3_value, info), info); in ADDU_16_() local
2071 return img_format("ADDU %s, %s, %s", rd3, rs3, rt3); in ADDU_16_()
2328 const char *rs3 = GPR(decode_gpr_gpr3(rs3_value, info), info); in AND_16_() local
2330 return img_format("AND %s, %s", rs3, rt3); in AND_16_()
[all …]
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| H A D | riscv.h | 203 uint8_t rs3; member
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| H A D | riscv.c | 4635 dec->rs3 = operand_rs3(inst); in decode_inst_operands()
5137 g_string_append(buf, rv_ireg_name_sym[dec->rs3]); in format_inst()
5139 g_string_append(buf, rv_freg_name_sym[dec->rs3]); in format_inst()
5266 g_string_append(buf, rv_vreg_name_sym[dec->rs3]); in format_inst()
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| /openbmc/qemu/target/riscv/ |
| H A D | fpu_helper.c | 122 uint64_t rs3, int flags) in do_fmadd_h() argument
126 float16 frs3 = check_nanbox_h(env, rs3); in do_fmadd_h()
132 uint64_t rs3, int flags) in do_fmadd_s() argument
136 float32 frs3 = check_nanbox_s(env, rs3); in do_fmadd_s()
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| H A D | insn32.decode | 20 %rs3 27:5
78 @r4_rm ..... .. ..... ..... ... ..... ....... %rs3 %rs2 %rs1 %rm %rd
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