| H A D | translate-a64.c | 346 static void check_lse2_align(DisasContext *s, int rn, int imm, in check_lse2_align() argument
356 tcg_gen_extrl_i64_i32(tmp, cpu_reg_sp(s, rn)); in check_lse2_align()
365 tcg_gen_addi_i64(addr, cpu_reg_sp(s, rn), imm); in check_lse2_align()
377 static MemOp check_atomic_align(DisasContext *s, int rn, MemOp mop) in check_atomic_align() argument
395 check_lse2_align(s, rn, 0, true, mop); in check_atomic_align()
403 static MemOp check_ordered_align(DisasContext *s, int rn, int imm, in check_ordered_align() argument
418 check_lse2_align(s, rn, imm, is_write, mop); in check_ordered_align()
660 static void gen_gvec_fn2(DisasContext *s, bool is_q, int rd, int rn, in gen_gvec_fn2() argument
663 gvec_fn(vece, vec_full_reg_offset(s, rd), vec_full_reg_offset(s, rn), in gen_gvec_fn2()
670 static void gen_gvec_fn2i(DisasContext *s, bool is_q, int rd, int rn, in gen_gvec_fn2i() argument
678 gen_gvec_fn3(DisasContext * s,bool is_q,int rd,int rn,int rm,GVecGen3Fn * gvec_fn,int vece) gen_gvec_fn3() argument
686 gen_gvec_fn4(DisasContext * s,bool is_q,int rd,int rn,int rm,int rx,GVecGen4Fn * gvec_fn,int vece) gen_gvec_fn4() argument
696 gen_gvec_op2_ool(DisasContext * s,bool is_q,int rd,int rn,int data,gen_helper_gvec_2 * fn) gen_gvec_op2_ool() argument
705 gen_gvec_op3_ool(DisasContext * s,bool is_q,int rd,int rn,int rm,int data,gen_helper_gvec_3 * fn) gen_gvec_op3_ool() argument
716 gen_gvec_op3_fpst(DisasContext * s,bool is_q,int rd,int rn,int rm,bool is_fp16,int data,gen_helper_gvec_3_ptr * fn) gen_gvec_op3_fpst() argument
728 gen_gvec_op4_ool(DisasContext * s,bool is_q,int rd,int rn,int rm,int ra,int data,gen_helper_gvec_4 * fn) gen_gvec_op4_ool() argument
742 gen_gvec_op4_env(DisasContext * s,bool is_q,int rd,int rn,int rm,int ra,int data,gen_helper_gvec_4_ptr * fn) gen_gvec_op4_env() argument
758 gen_gvec_op4_fpst(DisasContext * s,bool is_q,int rd,int rn,int rm,int ra,bool is_fp16,int data,gen_helper_gvec_4_ptr * fn) gen_gvec_op4_fpst() argument
1522 set_btype_for_br(DisasContext * s,int rn) set_btype_for_br() argument
2680 gen_load_exclusive(DisasContext * s,int rt,int rt2,int rn,int size,bool is_pair) gen_load_exclusive() argument
2726 gen_store_exclusive(DisasContext * s,int rd,int rt,int rt2,int rn,int size,int is_pair) gen_store_exclusive() argument
2842 gen_compare_and_swap(DisasContext * s,int rs,int rt,int rn,int size) gen_compare_and_swap() argument
2860 gen_compare_and_swap_pair(DisasContext * s,int rs,int rt,int rn,int size) gen_compare_and_swap_pair() argument
5796 do_3op_widening(DisasContext * s,MemOp memop,int top,int rd,int rn,int rm,int idx,NeonGenTwo64OpFn * fn,bool acc) do_3op_widening() argument
7348 TCGv_i64 rn = tcg_temp_new_i64(); TRANS() local
7469 TCGv_i64 rn = tcg_temp_new_i64(); do_scalar_shift_imm_narrow() local
7557 unsigned int sf, opc, shift_type, invert, rm, shift_amount, rn, rd; disas_logic_reg() local
7658 int rn = extract32(insn, 5, 5); disas_add_sub_ext_reg() local
7727 int rn = extract32(insn, 5, 5); disas_add_sub_reg() local
7782 int rn = extract32(insn, 5, 5); disas_data_proc_3src() local
7873 unsigned int sf, op, setflags, rm, rn, rd; disas_adc_sbc() local
7911 int rn = extract32(insn, 5, 5); disas_rotate_right_into_flags() local
7953 int rn = extract32(insn, 5, 5); disas_evaluate_into_flags() local
7984 unsigned int sf, op, y, cond, rn, nzcv, is_imm; disas_cc() local
8083 unsigned int sf, else_inv, rm, cond, else_inc, rn, rd; disas_cond_select() local
8133 handle_clz(DisasContext * s,unsigned int sf,unsigned int rn,unsigned int rd) handle_clz() argument
8150 handle_cls(DisasContext * s,unsigned int sf,unsigned int rn,unsigned int rd) handle_cls() argument
8167 handle_rbit(DisasContext * s,unsigned int sf,unsigned int rn,unsigned int rd) handle_rbit() argument
8185 handle_rev64(DisasContext * s,unsigned int sf,unsigned int rn,unsigned int rd) handle_rev64() argument
8198 handle_rev32(DisasContext * s,unsigned int sf,unsigned int rn,unsigned int rd) handle_rev32() argument
8213 handle_rev16(DisasContext * s,unsigned int sf,unsigned int rn,unsigned int rd) handle_rev16() argument
8235 unsigned int sf, opcode, opcode2, rn, rd; disas_data_proc_1src() local
8429 handle_div(DisasContext * s,bool is_signed,unsigned int sf,unsigned int rm,unsigned int rn,unsigned int rd) handle_div() argument
8458 handle_shift_reg(DisasContext * s,enum a64_shift_type shift_type,unsigned int sf,unsigned int rm,unsigned int rn,unsigned int rd) handle_shift_reg() argument
8471 handle_crc32(DisasContext * s,unsigned int sf,unsigned int sz,bool crc32c,unsigned int rm,unsigned int rn,unsigned int rd) handle_crc32() argument
8522 unsigned int sf, rm, opcode, rn, rd, setflag; disas_data_proc_2src() local
8705 handle_fp_compare(DisasContext * s,int size,unsigned int rn,unsigned int rm,bool cmp_with_zero,bool signal_all_nans) handle_fp_compare() argument
8767 unsigned int mos, type, rm, op, rn, opc, op2r; disas_fp_compare() local
8816 unsigned int mos, type, rm, cond, rn, op, nzcv; disas_fp_ccomp() local
8873 handle_fp_1src_half(DisasContext * s,int opcode,int rd,int rn) handle_fp_1src_half() argument
8923 handle_fp_1src_single(DisasContext * s,int opcode,int rd,int rn) handle_fp_1src_single() argument
8995 handle_fp_1src_double(DisasContext * s,int opcode,int rd,int rn) handle_fp_1src_double() argument
9067 handle_fp_fcvt(DisasContext * s,int opcode,int rd,int rn,int dtype,int ntype) handle_fp_fcvt() argument
9142 int rn = extract32(insn, 5, 5); disas_fp_1src() local
9230 handle_fpfpcvt(DisasContext * s,int rd,int rn,int opcode,bool itof,int rmode,int scale,int sf,int type) handle_fpfpcvt() argument
9397 int rn = extract32(insn, 5, 5); disas_fp_fixed_conv() local
9446 handle_fmov(DisasContext * s,int rd,int rn,int type,bool itof) handle_fmov() argument
9507 handle_fjcvtzs(DisasContext * s,int rd,int rn) handle_fjcvtzs() argument
9530 int rn = extract32(insn, 5, 5); disas_fp_int_conv() local
9668 handle_simd_intfp_conv(DisasContext * s,int rd,int rn,int elements,int is_signed,int fracbits,int size) handle_simd_intfp_conv() argument
9763 handle_simd_shift_intfp_conv(DisasContext * s,bool is_scalar,bool is_q,bool is_u,int immh,int immb,int opcode,int rn,int rd) handle_simd_shift_intfp_conv() argument
9806 handle_simd_shift_fpint_conv(DisasContext * s,bool is_scalar,bool is_q,bool is_u,int immh,int immb,int rn,int rd) handle_simd_shift_fpint_conv() argument
9916 int rn = extract32(insn, 5, 5); disas_simd_scalar_shift_imm() local
10054 handle_2misc_fcmp_zero(DisasContext * s,int opcode,bool is_scalar,bool is_u,bool is_q,int size,int rn,int rd) handle_2misc_fcmp_zero() argument
10183 handle_2misc_reciprocal(DisasContext * s,int opcode,bool is_scalar,bool is_u,bool is_q,int size,int rn,int rd) handle_2misc_reciprocal() argument
10256 handle_2misc_narrow(DisasContext * s,bool scalar,int opcode,bool u,bool is_q,int size,int rn,int rd) handle_2misc_narrow() argument
10380 int rn = extract32(insn, 5, 5); disas_simd_scalar_two_reg_misc() local
10568 int rn = extract32(insn, 5, 5); disas_simd_shift_imm() local
10608 handle_2misc_widening(DisasContext * s,int opcode,bool is_q,int size,int rn,int rd) handle_2misc_widening() argument
10652 handle_rev(DisasContext * s,int opcode,bool u,bool is_q,int size,int rn,int rd) handle_rev() argument
10722 handle_2misc_pairwise(DisasContext * s,int opcode,bool u,bool is_q,int size,int rn,int rd) handle_2misc_pairwise() argument
10788 handle_shll(DisasContext * s,bool is_q,int size,int rn,int rd) handle_shll() argument
10827 int rn = extract32(insn, 5, 5); disas_simd_two_reg_misc() local
11298 int rn, rd; disas_simd_two_reg_misc_fp16() local
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