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Searched refs:rl (Results 1 – 25 of 46) sorted by relevance

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/openbmc/qemu/tests/unit/
H A Dtest-mul64.c15 uint64_t rh, rl; member
43 uint64_t rl, rh; in test_u() local
44 mulu64(&rl, &rh, test_u_data[i].a, test_u_data[i].b); in test_u()
45 g_assert_cmpuint(rl, ==, test_u_data[i].rl); in test_u()
55 uint64_t rl, rh; in test_s() local
56 muls64(&rl, &rh, test_s_data[i].a, test_s_data[i].b); in test_s()
57 g_assert_cmpuint(rl, ==, test_s_data[i].rl); in test_s()
/openbmc/u-boot/drivers/bios_emulator/x86emu/
H A Dops2.c169 int mod, rl, rh; in x86emuOp2_set_byte() local
245 FETCH_DECODE_MODRM(mod, rh, rl); in x86emuOp2_set_byte()
247 destoffset = decode_rmXX_address(mod, rl); in x86emuOp2_set_byte()
251 destreg = DECODE_RM_BYTE_REGISTER(rl); in x86emuOp2_set_byte()
293 int mod, rl, rh; in x86emuOp2_bt_R() local
299 FETCH_DECODE_MODRM(mod, rh, rl); in x86emuOp2_bt_R()
301 srcoffset = decode_rmXX_address(mod, rl); in x86emuOp2_bt_R()
329 srcreg = DECODE_RM_LONG_REGISTER(rl); in x86emuOp2_bt_R()
338 srcreg = DECODE_RM_WORD_REGISTER(rl); in x86emuOp2_bt_R()
356 int mod, rl, rh; in x86emuOp2_shld_IMM() local
[all …]
H A Dops.c206 int mod, rl, rh; in x86emuOp_genop_byte_RM_R() local
216 FETCH_DECODE_MODRM(mod, rh, rl); in x86emuOp_genop_byte_RM_R()
218 { destoffset = decode_rmXX_address(mod,rl); in x86emuOp_genop_byte_RM_R()
229 destreg = DECODE_RM_BYTE_REGISTER(rl); in x86emuOp_genop_byte_RM_R()
246 int mod, rl, rh; in x86emuOp_genop_word_RM_R() local
254 FETCH_DECODE_MODRM(mod, rh, rl); in x86emuOp_genop_word_RM_R()
257 destoffset = decode_rmXX_address(mod,rl); in x86emuOp_genop_word_RM_R()
285 destreg = DECODE_RM_LONG_REGISTER(rl); in x86emuOp_genop_word_RM_R()
294 destreg = DECODE_RM_WORD_REGISTER(rl); in x86emuOp_genop_word_RM_R()
312 int mod, rl, rh; in x86emuOp_genop_byte_R_RM() local
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/openbmc/openbmc/meta-openembedded/meta-oe/recipes-core/sdbus-c++/sdbus-c++-libsystemd/
H A D0006-Use-uintmax_t-for-handling-rlim_t.patch61 @@ -307,13 +307,13 @@ int rlimit_format(const struct rlimit *rl, char **ret) {
62 if (rl->rlim_cur >= RLIM_INFINITY && rl->rlim_max >= RLIM_INFINITY)
64 else if (rl->rlim_cur >= RLIM_INFINITY)
65 - r = asprintf(&s, "infinity:" RLIM_FMT, rl->rlim_max);
66 + r = asprintf(&s, "infinity:" RLIM_FMT, (uintmax_t)rl->rlim_max);
67 else if (rl->rlim_max >= RLIM_INFINITY)
68 - r = asprintf(&s, RLIM_FMT ":infinity", rl->rlim_cur);
69 + r = asprintf(&s, RLIM_FMT ":infinity", (uintmax_t)rl->rlim_cur);
70 else if (rl->rlim_cur == rl->rlim_max)
71 - r = asprintf(&s, RLIM_FMT, rl->rlim_cur);
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/openbmc/openbmc/poky/meta/recipes-core/systemd/systemd/
H A D0007-Use-uintmax_t-for-handling-rlim_t.patch61 @@ -310,13 +310,13 @@ int rlimit_format(const struct rlimit *rl, char **ret) {
62 if (rl->rlim_cur >= RLIM_INFINITY && rl->rlim_max >= RLIM_INFINITY)
64 else if (rl->rlim_cur >= RLIM_INFINITY)
65 - r = asprintf(&s, "infinity:" RLIM_FMT, rl->rlim_max);
66 + r = asprintf(&s, "infinity:" RLIM_FMT, (uintmax_t)rl->rlim_max);
67 else if (rl->rlim_max >= RLIM_INFINITY)
68 - r = asprintf(&s, RLIM_FMT ":infinity", rl->rlim_cur);
69 + r = asprintf(&s, RLIM_FMT ":infinity", (uintmax_t)rl->rlim_cur);
70 else if (rl->rlim_cur == rl->rlim_max)
71 - r = asprintf(&s, RLIM_FMT, rl->rlim_cur);
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/openbmc/qemu/target/riscv/
H A Dm128_helper.c48 target_ulong rl, rh; in HELPER() local
52 rl = ul; in HELPER()
56 rl = int128_getlo(r); in HELPER()
61 return rl; in HELPER()
93 target_ulong rh, rl; in HELPER() local
97 rl = ul; in HELPER()
101 rl = int128_getlo(r); in HELPER()
106 return rl; in HELPER()
/openbmc/u-boot/include/linux/
H A Dmath64.h194 } rl, rm, rn, rh, a0, b0; in mul_u64_u64_shr() local
200 rl.ll = mul_u32_u32(a0.l.low, b0.l.low); in mul_u64_u64_shr()
210 rl.l.high = c = (u64)rl.l.high + rm.l.low + rn.l.low; in mul_u64_u64_shr()
219 return rl.ll; in mul_u64_u64_shr()
221 return (rl.ll >> shift) | (rh.ll << (64 - shift)); in mul_u64_u64_shr()
240 } u, rl, rh; in mul_u64_u32_div() local
243 rl.ll = mul_u32_u32(u.l.low, mul); in mul_u64_u32_div()
244 rh.ll = mul_u32_u32(u.l.high, mul) + rl.l.high; in mul_u64_u32_div()
247 rl.l.high = do_div(rh.ll, divisor); in mul_u64_u32_div()
250 do_div(rl.ll, divisor); in mul_u64_u32_div()
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/openbmc/qemu/crypto/
H A Dclmul.c98 uint64_t rl = 0, rh = 0; in clmul_64_gen() local
102 rl = m; in clmul_64_gen()
107 rl ^= (m << i) & mask; in clmul_64_gen()
110 return int128_make128(rl, rh); in clmul_64_gen()
/openbmc/qemu/target/riscv/insn_trans/
H A Dtrans_rvm.c.inc50 static void gen_mul_i128(TCGv rl, TCGv rh,
58 tcg_gen_mulu2_tl(rl, rh, rs1l, rs2l);
71 static void gen_mulh_i128(TCGv rl, TCGv rh,
79 gen_mulhu_i128(rl, rh, rs1l, rs1h, rs2l, rs2h);
86 tcg_gen_sub2_tl(t0l, t0h, rl, rh, t0l, t0h);
87 tcg_gen_sub2_tl(rl, rh, t0l, t0h, t1l, t1h);
110 static void gen_mulhsu_i128(TCGv rl, TCGv rh,
117 gen_mulhu_i128(rl, rh, rs1l, rs1h, rs2l, rs2h);
121 tcg_gen_sub2_tl(rl, rh, rl, rh, t0l, t0h);
126 TCGv rl = tcg_temp_new();
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H A Dtrans_rvi.c.inc197 static TCGCond gen_compare_i128(bool bz, TCGv rl,
208 tcg_gen_or_tl(rl, al, ah);
210 tcg_gen_xor_tl(rl, al, bl);
212 tcg_gen_or_tl(rl, rl, rh);
219 tcg_gen_mov_tl(rl, ah);
223 tcg_gen_sub2_tl(rl, rh, al, ah, bl, bh);
224 tcg_gen_xor_tl(rl, rh, ah);
226 tcg_gen_and_tl(rl, rl, tmp);
227 tcg_gen_xor_tl(rl, rh, rl);
245 tcg_gen_sub2_tl(tmp, rl, tmp, rh, bh, zero);
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/openbmc/qemu/bsd-user/
H A Dmain.c246 struct rlimit rl; in adjust_ssize() local
248 if (getrlimit(RLIMIT_STACK, &rl) != 0) { in adjust_ssize()
252 target_maxssiz = MIN(target_maxssiz, rl.rlim_max); in adjust_ssize()
253 target_dflssiz = MIN(MAX(target_dflssiz, rl.rlim_cur), target_maxssiz); in adjust_ssize()
255 rl.rlim_max = target_maxssiz; in adjust_ssize()
256 rl.rlim_cur = target_dflssiz; in adjust_ssize()
257 setrlimit(RLIMIT_STACK, &rl); in adjust_ssize()
/openbmc/u-boot/drivers/bios_emulator/include/x86emu/
H A Ddecode.h46 #define FETCH_DECODE_MODRM(mod,rh,rl) fetch_decode_modrm(&mod,&rh,&rl) argument
/openbmc/openbmc/poky/meta/recipes-bsp/v86d/v86d/
H A DUpdate-x86emu-from-X.org.patch2182 int mod, rl, rh;
2187 DECODE_PRINTINSTR32(x86emu_fpu_op_d9_tab, mod, rh, rl);
2191 DECODE_PRINTF(x86emu_fpu_op_d9_tab1[(rh << 3) + rl]);
2197 destoffset = decode_rm00_address(rl);
2202 destoffset = decode_rm01_address(rl);
2207 destoffset = decode_rm10_address(rl);
2211 - stkelem = (u8)rl;
2218 + stkelem = (u8) rl;
2243 switch (rl) {
2259 switch (rl) {
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/openbmc/qemu/util/
H A Dhost-utils.c44 LL rl, rm, rn, rh, a0, b0; in mul64() local
50 rl.ll = (uint64_t)a0.l.low * b0.l.low; in mul64()
55 c = (uint64_t)rl.l.high + rm.l.low + rn.l.low; in mul64()
56 rl.l.high = c; in mul64()
62 *plow = rl.ll; in mul64()
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-extended/sblim-sfcb/sblim-sfcb/
H A Dsblim-sfcb-1.3.15-fix-provider-debugging.patch8 (void **) &parms->req, &rl, &mqg);
/openbmc/openbmc/poky/meta/recipes-core/readline/
H A Dreadline.inc56 SRC_URI:append:class-native = " file://rl-native.map"
57 LDFLAGS:append:class-native = " -Wl,--version-script=${UNPACKDIR}/rl-native.map"
/openbmc/qemu/tcg/
H A Dtcg-op.c1084 void tcg_gen_add2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al, in tcg_gen_add2_i32() argument
1091 tcg_gen_mov_i32(rl, t0); in tcg_gen_add2_i32()
1100 tcg_gen_mov_i32(rl, t0); in tcg_gen_add2_i32()
1133 void tcg_gen_sub2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al, in tcg_gen_sub2_i32() argument
1140 tcg_gen_mov_i32(rl, t0); in tcg_gen_sub2_i32()
1149 tcg_gen_mov_i32(rl, t0); in tcg_gen_sub2_i32()
1155 void tcg_gen_mulu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2) in tcg_gen_mulu2_i32() argument
1158 tcg_gen_op4_i32(INDEX_op_mulu2, rl, rh, arg1, arg2); in tcg_gen_mulu2_i32()
1163 tcg_gen_mov_i32(rl, t); in tcg_gen_mulu2_i32()
1171 tcg_gen_extr_i64_i32(rl, rh, t0); in tcg_gen_mulu2_i32()
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/openbmc/qemu/include/qemu/
H A Dhost-utils.h104 uint64_t rl, rh; in muldiv64_rounding() local
107 rl = (uint64_t)u.l.low * (uint64_t)b; in muldiv64_rounding()
109 rl += c - 1; in muldiv64_rounding()
112 rh += (rl >> 32); in muldiv64_rounding()
114 res.l.low = (((rh % c) << 32) + (rl & 0xffffffff)) / c; in muldiv64_rounding()
/openbmc/qemu/include/tcg/
H A Dtcg-op-common.h135 void tcg_gen_add2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
137 void tcg_gen_sub2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
141 void tcg_gen_mulu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
142 void tcg_gen_muls2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
143 void tcg_gen_mulsu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
240 void tcg_gen_add2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
242 void tcg_gen_sub2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
246 void tcg_gen_mulu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
247 void tcg_gen_muls2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
248 void tcg_gen_mulsu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
/openbmc/openbmc/meta-security/meta-tpm/recipes-core/systemd/
H A Dsystemd_%.bbappend15 $( grep -rl ^ConditionSecurity=measured-uki ${D} )
/openbmc/qemu/linux-user/
H A Dflatload.c150 static void old_reloc(struct lib_info *libinfo, uint32_t rl) in old_reloc() argument
159 offset = rl & 0x3fffffff; in old_reloc()
160 reloc_type = rl >> 30; in old_reloc()
/openbmc/u-boot/drivers/video/
H A Dipu_regs.h259 u32 rl[5]; member
384 #define DC_RL_CH(ch, evt) (&dc_ch_offset(ch)->rl[evt / 2])
/openbmc/u-boot/doc/
H A DREADME.rockusb50 - rl : Read blocks using LBA
/openbmc/openbmc-tools/dbus-vis/
H A Dipmi_timeline_vis.js497 function MapXCoord(x, left_margin, right_margin, rl, rr) { argument
498 let ret = left_margin + (x - rl) / (rr - rl) * (right_margin - left_margin);
/openbmc/qemu/target/tricore/
H A Dtranslate.c181 #define GEN_HELPER_RRR(name, rl, rh, al1, ah1, arg2) do { \ argument
187 tcg_gen_extr_i64_i32(rl, rh, ret); \
190 #define GEN_HELPER_RR(name, rl, rh, arg1, arg2) do { \ argument
194 tcg_gen_extr_i64_i32(rl, rh, ret); \
228 static void gen_st_2regs_64(TCGv rh, TCGv rl, TCGv address, DisasContext *ctx) in gen_st_2regs_64() argument
232 tcg_gen_concat_i32_i64(temp, rl, rh); in gen_st_2regs_64()
236 static void gen_offset_st_2regs(TCGv rh, TCGv rl, TCGv base, int16_t con, in gen_offset_st_2regs() argument
241 gen_st_2regs_64(rh, rl, temp, ctx); in gen_offset_st_2regs()
244 static void gen_ld_2regs_64(TCGv rh, TCGv rl, TCGv address, DisasContext *ctx) in gen_ld_2regs_64() argument
250 tcg_gen_extr_i64_i32(rl, rh, temp); in gen_ld_2regs_64()
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