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Searched refs:riscv_aclint_swi_create (Results 1 – 8 of 8) sorted by relevance

/openbmc/qemu/include/hw/intc/
H A Driscv_aclint.h71 DeviceState *riscv_aclint_swi_create(hwaddr addr, uint32_t hartid_base,
/openbmc/qemu/hw/riscv/
H A Dshakti_c.c125 riscv_aclint_swi_create(shakti_c_memmap[SHAKTI_C_CLINT].base, in type_init()
H A Dsifive_e.c222 riscv_aclint_swi_create(memmap[SIFIVE_E_DEV_CLINT].base, in sifive_e_soc_realize()
H A Dspike.c250 riscv_aclint_swi_create( in spike_board_init()
H A Dvirt.c1413 riscv_aclint_swi_create(memmap[VIRT_CLINT].base + in virt_machine_init()
1424 riscv_aclint_swi_create(memmap[VIRT_ACLINT_SSWI].base + in virt_machine_init()
1430 riscv_aclint_swi_create( in virt_machine_init()
H A Dmicrochip_pfsoc.c251 riscv_aclint_swi_create(memmap[MICROCHIP_PFSOC_CLINT].base, in microchip_pfsoc_soc_realize()
H A Dsifive_u.c850 riscv_aclint_swi_create(memmap[SIFIVE_U_DEV_CLINT].base, 0, in sifive_u_soc_realize()
/openbmc/qemu/hw/intc/
H A Driscv_aclint.c533 DeviceState *riscv_aclint_swi_create(hwaddr addr, uint32_t hartid_base, in riscv_aclint_swi_create() function