| /openbmc/u-boot/drivers/adc/ |
| H A D | meson-saradc.c | 195 regmap_update_bits(priv->regmap, MESON_SAR_ADC_DELAY, in meson_saradc_lock()
218 regmap_update_bits(priv->regmap, MESON_SAR_ADC_DELAY, in meson_saradc_unlock()
297 regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG0, in meson_saradc_start_sample_engine()
301 regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG0, in meson_saradc_start_sample_engine()
305 regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG0, in meson_saradc_start_sample_engine()
312 regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG0, in meson_saradc_stop_sample_engine()
315 regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG0, in meson_saradc_stop_sample_engine()
322 regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG0, in meson_saradc_stop_sample_engine()
347 regmap_update_bits(priv->regmap, MESON_SAR_ADC_AVG_CNTL, in meson_saradc_set_averaging()
352 regmap_update_bits(priv->regmap, MESON_SAR_ADC_AVG_CNTL, in meson_saradc_set_averaging()
[all …]
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| /openbmc/u-boot/drivers/power/domain/ |
| H A D | meson-gx-pwrc-vpu.c | 52 regmap_update_bits(priv->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, in meson_gx_pwrc_vpu_on()
58 regmap_update_bits(priv->regmap_hhi, HHI_VPU_MEM_PD_REG0, in meson_gx_pwrc_vpu_on()
64 regmap_update_bits(priv->regmap_hhi, HHI_VPU_MEM_PD_REG1, in meson_gx_pwrc_vpu_on()
70 regmap_update_bits(priv->regmap_hhi, HHI_MEM_PD_REG0, in meson_gx_pwrc_vpu_on()
80 regmap_update_bits(priv->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, in meson_gx_pwrc_vpu_on()
99 regmap_update_bits(priv->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, in meson_gx_pwrc_vpu_off()
105 regmap_update_bits(priv->regmap_hhi, HHI_VPU_MEM_PD_REG0, in meson_gx_pwrc_vpu_off()
110 regmap_update_bits(priv->regmap_hhi, HHI_VPU_MEM_PD_REG1, in meson_gx_pwrc_vpu_off()
115 regmap_update_bits(priv->regmap_hhi, HHI_MEM_PD_REG0, in meson_gx_pwrc_vpu_off()
121 regmap_update_bits(priv->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, in meson_gx_pwrc_vpu_off()
|
| /openbmc/u-boot/drivers/spi/ |
| H A D | meson_spifc.c | 148 regmap_update_bits(spifc->regmap, REG_USER, USER_UC_MASK, in meson_spifc_txrx()
154 regmap_update_bits(spifc->regmap, REG_USER, USER_DIN_EN_MS, in meson_spifc_txrx()
160 regmap_update_bits(spifc->regmap, REG_USER4, USER4_CS_ACT, in meson_spifc_txrx()
164 regmap_update_bits(spifc->regmap, REG_SLAVE, SLAVE_TRST_DONE, 0); in meson_spifc_txrx()
166 regmap_update_bits(spifc->regmap, REG_CMD, CMD_USER, CMD_USER); in meson_spifc_txrx()
200 regmap_update_bits(spifc->regmap, REG_CTRL, CTRL_ENABLE_AHB, 0); in meson_spifc_xfer()
210 regmap_update_bits(spifc->regmap, REG_CTRL, CTRL_ENABLE_AHB, in meson_spifc_xfer()
256 regmap_update_bits(spifc->regmap, REG_USER, USER_CLK_NOT_INV, in meson_spifc_set_mode()
259 regmap_update_bits(spifc->regmap, REG_USER4, USER4_CS_POL_HIGH, in meson_spifc_set_mode()
272 regmap_update_bits(spifc->regmap, REG_SLAVE, SLAVE_SW_RST, in meson_spifc_hw_init()
[all …]
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| /openbmc/u-boot/drivers/reset/ |
| H A D | reset-mediatek.c | 40 return regmap_update_bits(priv->regmap, in mediatek_reset_assert()
52 return regmap_update_bits(priv->regmap, in mediatek_reset_deassert()
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| /openbmc/u-boot/test/dm/ |
| H A D | regmap.c | 112 ut_assertok(regmap_update_bits(map, 0, 0xff00ff00, 0x55aa2211)); in dm_test_regmap_rw()
113 ut_assertok(regmap_update_bits(map, 3, 0x00ff00ff, 0xcacafada)); in dm_test_regmap_rw()
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| /openbmc/u-boot/drivers/net/ |
| H A D | mt7628-eth.c | 305 regmap_update_bits(priv->sysctrl_regmap, MT7628_AGPIO_CFG_REG, in rt305x_esw_init()
309 regmap_update_bits(priv->sysctrl_regmap, MT7628_RSTCTRL_REG, in rt305x_esw_init()
311 regmap_update_bits(priv->sysctrl_regmap, MT7628_RSTCTRL_REG, in rt305x_esw_init()
316 regmap_update_bits(priv->sysctrl_regmap, MT7628_GPIO2_MODE_REG, in rt305x_esw_init()
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| /openbmc/u-boot/include/ |
| H A D | regmap.h | 301 int regmap_update_bits(struct regmap *map, uint offset, uint mask, uint val);
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| /openbmc/u-boot/drivers/clk/ |
| H A D | clk_meson.c | 222 regmap_update_bits(priv->map, gate->reg, in meson_set_gate_by_id()
387 regmap_update_bits(priv->map, parm->reg_off, SETPMASK(parm->width, parm->shift), in meson_div_set_rate()
548 regmap_update_bits(priv->map, parm->reg_off, SETPMASK(parm->width, parm->shift), in meson_mux_set_parent()
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| H A D | clk_meson_axg.c | 64 regmap_update_bits(priv->map, gate->reg, in meson_set_gate()
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| /openbmc/u-boot/drivers/core/ |
| H A D | regmap.c | 412 int regmap_update_bits(struct regmap *map, uint offset, uint mask, uint val) in regmap_update_bits() function
|