Searched refs:reg_base_addr (Results 1 – 5 of 5) sorted by relevance
49 void cadence_qspi_apb_controller_enable(void *reg_base_addr);50 void cadence_qspi_apb_controller_disable(void *reg_base_addr);52 int cadence_qspi_apb_command_read(void *reg_base_addr,54 int cadence_qspi_apb_command_write(void *reg_base_addr,
124 if (!drhd->reg_base_addr) { in iommu_regset_show()131 iommu->name, drhd->reg_base_addr); in iommu_regset_show()568 iommu->name, drhd->reg_base_addr); in latency_show_one()
396 dmaru->reg_base_addr == drhd->address) in dmar_find_dmaru()428 dmaru->reg_base_addr = drhd->address; in dmar_parse_one_drhd()496 if (drhd->reg_base_addr == rhsa->base_address) { in dmar_parse_one_rhsa()752 dev_name(&adev->dev), dmaru->reg_base_addr, in dmar_acpi_insert_dev_scope()968 u64 phys_addr = drhd->reg_base_addr; in map_iommu()1046 if (!drhd->reg_base_addr) { in alloc_iommu()1104 (unsigned long long)drhd->reg_base_addr, in alloc_iommu()2121 (unsigned long long)drhd->reg_base_addr, ret); in enable_drhd_fault_handling()
680 if (!drhd || drhd->reg_base_addr - vtbar != 0xa000) { in quirk_ioat_snb_local_iommu()
41 u64 reg_base_addr; /* register base address*/ member