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Searched refs:regUVD_SUVD_CGC_GATE (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v4_0_3.c581 data = RREG32_SOC15(VCN, vcn_inst, regUVD_SUVD_CGC_GATE); in vcn_v4_0_3_disable_clock_gating()
603 WREG32_SOC15(VCN, vcn_inst, regUVD_SUVD_CGC_GATE, data); in vcn_v4_0_3_disable_clock_gating()
661 VCN, 0, regUVD_SUVD_CGC_GATE), 1, sram_sel, indirect); in vcn_v4_0_3_disable_clock_gating_dpg_mode()
H A Dvcn_v4_0.c724 data = RREG32_SOC15(VCN, inst, regUVD_SUVD_CGC_GATE); in vcn_v4_0_disable_clock_gating()
749 WREG32_SOC15(VCN, inst, regUVD_SUVD_CGC_GATE, data); in vcn_v4_0_disable_clock_gating()
815 VCN, inst_idx, regUVD_SUVD_CGC_GATE), 1, sram_sel, indirect); in vcn_v4_0_disable_clock_gating_dpg_mode()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_6_0_offset.h1252 #define regUVD_SUVD_CGC_GATE … macro
H A Dvcn_4_0_0_offset.h72 #define regUVD_SUVD_CGC_GATE … macro
H A Dvcn_4_0_3_offset.h72 #define regUVD_SUVD_CGC_GATE … macro