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Searched refs:regUVD_RB_SIZE (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_6_0_offset.h1316 #define regUVD_RB_SIZE macro
H A Dvcn_4_0_0_offset.h210 #define regUVD_RB_SIZE macro
H A Dvcn_4_0_3_offset.h210 #define regUVD_RB_SIZE macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v4_0_3.c823 WREG32_SOC15(VCN, vcn_inst, regUVD_RB_SIZE, in vcn_v4_0_3_start_dpg_mode()
1187 WREG32_SOC15(VCN, vcn_inst, regUVD_RB_SIZE, in vcn_v4_0_3_start()
H A Dvcn_v4_0.c1008 WREG32_SOC15(VCN, inst_idx, regUVD_RB_SIZE, ring->ring_size / 4); in vcn_v4_0_start_dpg_mode()
1191 WREG32_SOC15(VCN, i, regUVD_RB_SIZE, ring->ring_size / 4); in vcn_v4_0_start()