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Searched refs:regUVD_POWER_STATUS (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v4_0.c588 data = RREG32_SOC15(VCN, inst, regUVD_POWER_STATUS); in vcn_v4_0_disable_static_power_gating()
594 WREG32_SOC15(VCN, inst, regUVD_POWER_STATUS, data); in vcn_v4_0_disable_static_power_gating()
613 data = RREG32_SOC15(VCN, inst, regUVD_POWER_STATUS); in vcn_v4_0_enable_static_power_gating()
616 WREG32_SOC15(VCN, inst, regUVD_POWER_STATUS, data); in vcn_v4_0_enable_static_power_gating()
921 WREG32_P(SOC15_REG_OFFSET(VCN, inst_idx, regUVD_POWER_STATUS), 1, in vcn_v4_0_start_dpg_mode()
924 tmp = RREG32_SOC15(VCN, inst_idx, regUVD_POWER_STATUS); in vcn_v4_0_start_dpg_mode()
927 WREG32_SOC15(VCN, inst_idx, regUVD_POWER_STATUS, tmp); in vcn_v4_0_start_dpg_mode()
1436 SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_POWER_STATUS, 1, in vcn_v4_0_stop_dpg_mode()
1443 SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_POWER_STATUS, 1, in vcn_v4_0_stop_dpg_mode()
1447 WREG32_P(SOC15_REG_OFFSET(VCN, inst_idx, regUVD_POWER_STATUS), 0, in vcn_v4_0_stop_dpg_mode()
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H A Dvcn_v4_0_3.c724 WREG32_P(SOC15_REG_OFFSET(VCN, vcn_inst, regUVD_POWER_STATUS), 1, in vcn_v4_0_3_start_dpg_mode()
727 tmp = RREG32_SOC15(VCN, vcn_inst, regUVD_POWER_STATUS); in vcn_v4_0_3_start_dpg_mode()
730 WREG32_SOC15(VCN, vcn_inst, regUVD_POWER_STATUS, tmp); in vcn_v4_0_3_start_dpg_mode()
1227 SOC15_WAIT_ON_RREG(VCN, vcn_inst, regUVD_POWER_STATUS, 1, in vcn_v4_0_3_stop_dpg_mode()
1234 SOC15_WAIT_ON_RREG(VCN, vcn_inst, regUVD_POWER_STATUS, 1, in vcn_v4_0_3_stop_dpg_mode()
1238 WREG32_P(SOC15_REG_OFFSET(VCN, vcn_inst, regUVD_POWER_STATUS), 0, in vcn_v4_0_3_stop_dpg_mode()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_6_0_offset.h1070 #define regUVD_POWER_STATUS … macro
H A Dvcn_4_0_0_offset.h1150 #define regUVD_POWER_STATUS … macro
H A Dvcn_4_0_3_offset.h1066 #define regUVD_POWER_STATUS … macro